Vertical JFET Source Trench Layout for Avalanche Breakdown
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Solution Overview
Problem
Conventional power semiconductor devices face challenges with unclamped inductive switching (UIS) and high gate-drain capacitance, leading to potential device failure and high switching losses, particularly in silicon carbide-based JFETs.
Innovation Solution
The design incorporates deeper source trenches connected to the drift layer, with optional doped regions and altered trench configurations to divert gate-drain capacitance to drain-source capacitance, enhancing avalanche current handling and reducing thermal runaway risks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional power semiconductor devices are designed with standard trench configurations, then the device structure is simple and easy to manufacture, but the gate-drain capacitance is high leading to high switching losses
Solution Approach 1:
The device divides the trench structure into multiple types: first trenches containing gate contacts and second trenches containing source contacts. This segmentation allows separate optimization of gate and source regions, reducing gate-drain capacitance while maintaining manufacturability through systematic patterning processes
Solution Approach 2:
Different regions of the device are given different trench configurations - gate trenches are optimized for electrical isolation and capacitance reduction, while source trenches are optimized for current collection. This local differentiation addresses specific functional requirements in different areas without complicating the entire device structure
2Reliability
If deeper source trenches are implemented to connect to the drift layer, then avalanche current handling is improved and thermal runaway risk is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The deeper source trenches are formed as part of the preliminary device fabrication process, establishing the drain-source current path before final device assembly. This preliminary action ensures proper avalanche breakdown characteristics are built into the device structure, improving reliability while allowing standard manufacturing tolerances to be maintained
3Loss of energy
If gate-drain capacitance is diverted to drain-source capacitance, then switching losses are reduced, but the device requires more complex trench configurations
Solution Approach 1:
The deeper source trenches act as intermediaries that provide alternative current paths, effectively diverting capacitance from the gate-drain junction to the drain-source path. This intermediary structure reduces switching losses by minimizing the Miller effect while maintaining a manageable device architecture through systematic trench formation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the device's ability to handle UIS currents and reduces switching losses by uniformly dissipating heat and lowering gate-drain capacitance, thereby increasing reliability and efficiency.
Implementation Method 1
divert gate-drain capacitance to drain-source capacitance, enhancing avalanche current handling and reducing thermal runaway risks
Implementation Method 2
Semiconductor devices with drain-source connection for avalanche breakdown
Data Source
AI summary
A vertical junction field effect (JFET) semiconductor device according to some embodiments includes a drift layer, a channel layer on the drift layer, and a plurality of alternating trenches and mesas in the channel layer, wherein a first plurality of the trenches includes gate contact regions. A source metallization is on the mesas. The device includes a second different than the first plurality of trenches, wherein the source metallization is electrically connected to the drift layer at a bottom of the second trench.