JIT Compilation Unified Simulation Engine for Circuit Design
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Solution Overview
Problem
Current simulation engines used with high-level modeling systems for integrated circuit design suffer from inefficiencies due to latency in inter-process communication and limited integration, which results in longer simulation times and restricted observability of internal states during simulation.
Innovation Solution
A simulation engine is developed that compiles source code and simulation models into a single, integrated software component using Just-In-Time compilation, allowing for reduced inter-process communication and enabling the preservation, reading, and writing of state information during simulation, with callback functions and data pointers facilitating efficient data exchange between the simulation engine and the high-level modeling system.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a simulation engine runs as a plug-in of an HLMS with inter-process communication, then the HLMS functionality can be extended, but latency is introduced resulting in longer simulation times
Solution Approach 1:
The patent merges the simulation engine and HLMS into a single integrated process by compiling both as unified native machine code using JIT compilation. This eliminates the plug-in architecture and inter-process communication boundaries, allowing the simulation engine to operate as an integral part of the HLMS rather than as a separate component, thereby removing communication latency while preserving functional extension capabilities
Solution Approach 2:
The patent introduces callback functions as an intermediary mechanism that allows the simulation engine to主动 notify the HLMS of events and state changes without requiring continuous polling or IPC. This mediator approach enables efficient event-driven communication within the unified process, replacing the inefficient IPC-based notification system while maintaining the collaborative functionality between simulation and modeling components
2Ease of operation
If a simulation engine operates as a slave of the HLMS with master-initiated queries, then the HLMS maintains control, but inefficiencies are introduced into the simulation
Solution Approach 1:
The patent inverts the traditional master-slave control model by enabling the simulation engine to主动 initiate callbacks to the HLMS when specific events occur or when data is ready. This inversion allows the simulation engine to drive the interaction flow rather than being passively queried, significantly improving efficiency while the HLMS retains overall control through the callback registration and invocation mechanism
Solution Approach 2:
The simulation engine performs self-service by autonomously managing its own execution flow and actively notifying the HLMS of relevant events through callbacks. This self-service approach eliminates the need for the HLMS to continuously monitor and query the simulation engine, allowing the simulation to proceed efficiently while the HLMS intervenes only when necessary through the callback mechanism
3Speed
If JIT compilation is used to increase simulation performance, then execution speed improves, but internal states become less observable during simulation
Solution Approach 1:
The patent implements feedback mechanisms through callback functions that allow the simulation engine to notify the HLMS of internal state changes, events, and progress during execution. This feedback system maintains full observability of internal states despite JIT compilation by providing structured notification points where the HLMS can query and monitor simulation progress, debug information, and state data without interfering with the optimized execution flow
Data Source
AI summary
A computer-implemented method of creating a simulation engine for simulating a circuit design can include receiving a source code contribution from a high level modeling system and receiving a simulation model specified in an interpretive language that specifies the circuit design. The source code contribution can be compiled together with the simulation model using a Just-In-Time compiler. A simulation engine, specified in native machine code, can be output as a single, integrated software component formed from the source code contribution and the simulation model.