Jitter Amplifier Using Variable Delay Circuit for Phase Synchronization
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Solution Overview
Problem
Conventional Phase Locked Loops (PLLs) are ineffective in amplifying or attenuating jitter components, especially in low offset frequency ranges, limiting their ability to synchronize phase oscillating signals with reference signals and failing to function as either jitter amplifiers or attenuators.
Innovation Solution
A jitter amplifier comprising a jitter demodulator and an amplifying circuit with a variable delay circuit, which demodulates and controls the phase of the input signal based on the jitter component, allowing for amplification or attenuation of jitter by adjusting the delay value corresponding to the demodulated jitter signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a PLL is used to synchronize phase of oscillating signal with reference signal, then phase synchronization is achieved, but the jitter component cannot be amplified or attenuated
Solution Approach 1:
The invention segments the PLL into distinct functional blocks: a phase detector for detecting phase difference, a loop filter for filtering the control signal, a voltage controlled oscillator for generating the oscillating signal, and a frequency divider for dividing the frequency. This segmentation allows independent optimization of each block for jitter amplification while maintaining phase synchronization capability.
Solution Approach 2:
The invention makes the loop filter dynamic by making its cutoff frequency adjustable. The loop filter's cutoff frequency is set to be higher than the offset frequency of the jitter component, allowing the jitter to pass through while filtering out other frequency components. This dynamic adjustment enables the system to amplify jitter selectively without compromising phase synchronization.
2Object-affected harmful factors
If the gain of PLL is reduced to attenuate jitter, then jitter in high offset frequency is reduced, but jitter in low offset frequency cannot be attenuated
Solution Approach 1:
The invention changes the key parameter of the loop filter, specifically its cutoff frequency, to be higher than the offset frequency of the jitter component. This parameter change allows the loop filter to pass low offset frequency jitter components while still filtering out high offset frequency noise, thereby enabling jitter attenuation in the high offset frequency range while maintaining phase synchronization in the low offset frequency range.
3Manufacturing precision
If the gain of PLL is increased to amplify jitter component, then jitter amplification is achieved, but phase synchronization is degraded
Solution Approach 1:
The invention uses feedback through the frequency divider to feed back a portion of the oscillating signal to the phase detector. This feedback mechanism continuously monitors the phase difference between the reference signal and the oscillating signal, allowing the system to maintain phase synchronization even when the gain is increased for jitter amplification. The feedback loop ensures that phase synchronization stability is preserved while enabling precise jitter amplification.
Data Source
AI summary
There is provided a jitter amplifier for amplifying or attenuating a jitter component contained in an input signal, having a jitter demodulating section for demodulating the jitter component from the input signal and an amplifying circuit for amplifying or attenuating the jitter component by controlling phase of the input signal based on the jitter component.