On-Chip Jitter Measurement via Phase Difference Amplification
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Solution Overview
Problem
Current jitter measurement techniques face challenges in accurately measuring high-speed clock signals due to limitations in resolution and bandwidth, leading to errors and increased costs, especially when dealing with high-frequency signals where external instruments may introduce interference and noise.
Innovation Solution
A jitter measurement system comprising a delay circuit, a jitter amplifier, and a converter that amplifies the phase difference between the clock signal and its delayed version to improve resolution, allowing for more accurate measurement of cycle-to-cycle jitter by converting the amplified phase difference into a digital value.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external instruments (oscilloscopes) are used to measure high-frequency clock signals, then measurement capability is obtained, but measurement precision deteriorates due to interference, bandwidth limitations, and noise from I/O interfaces and output buffers
Solution Approach 1:
The patent introduces an on-chip jitter measurement system that acts as an intermediary between the clock signal and the external measurement environment. The delay circuit, jitter amplifier, and converter are integrated within the chip to measure jitter internally before the signal exits to external instruments, thereby eliminating the harmful effects of external interference, bandwidth limitations, and noise from I/O interfaces and output buffers.
2Measurement precision
If high sampling rate oscilloscopes (greater than 10 GS/s) are used to measure GHz frequency signals, then measurement precision improves, but device cost increases to tens of thousands of US dollars
Solution Approach 1:
The patent implements a self-service measurement system where the chip itself performs jitter measurement through integrated circuits (delay circuit, jitter amplifier, and converter). This eliminates the need for expensive external high-speed oscilloscopes by providing the measurement capability directly within the chip, thereby dramatically reducing device cost while maintaining measurement precision.
3Measurement precision
If time analysis method with Time-to-Digital Conversion is used for jitter measurement, then measurement capability is obtained, but measurement precision deteriorates due to slow operational speed (MHz range) and low resolution of PC peripherals
Solution Approach 1:
The patent replaces the mechanical/electronic Time-to-Digital Conversion system with a phase-difference-based measurement system. Instead of converting time to digital values through slow PC peripherals, the system directly measures phase difference between clock signals using integrated circuits that operate at GHz frequencies, thereby achieving both high speed and high resolution simultaneously.
4Measurement precision
If delay amount of delay units is increased to measure small jitter values, then measurement resolution improves, but measurement precision deteriorates due to quantization error
Solution Approach 1:
The patent changes the measurement parameter from direct time delay measurement to phase difference measurement. By measuring phase difference between the original clock signal and the delayed signal, the system achieves high resolution for small jitter values without introducing quantization errors, as the phase difference can be measured continuously rather than through discrete digital steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The system enhances measurement resolution and accuracy for high-speed clock signals by amplifying the phase difference, reducing errors and costs associated with external instrumentation, while maintaining consistent amplification across varying frequencies.
Implementation Method 1
a delay circuit, for receiving a clock signal and delaying the clock signal to generate a delay signal
Implementation Method 2
a jitter amplifier, for amplifying the received clock signal and delay signal to generate a first signal and a second signal; wherein the phase difference between the first signal and the second signal is the amplified value of input jitter of the clock signal
Implementation Method 3
a converter, for converting the phase difference between the first signal and the second signal into a digital value
Data Source
AI summary
The present invention relates to a jitter measuring system, comprising: a delay circuit for receiving a clock signal and delaying the clock signal to generate a delay signal; a jitter amplifier for receiving the clock signal and delay signal to generate a first signal and a second signal; and a converter for converting a phase different between the first signal and the second signal into a relevant digital code; wherein the phase difference between the first signal and the second signal is an amplification of jitter.