Jitter Self-Test Using Timestamps in Clock Generator Circuits
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Solution Overview
Problem
Conventional methods for testing integrated circuit devices for jitter specifications are time-consuming and require expensive equipment, limiting the efficiency of identifying devices that meet target jitter tolerance, especially in high-frequency applications.
Innovation Solution
A method and integrated circuit design that generates a phase-adjusted clock signal using a frequency-divided clock signal and a reference clock signal to estimate jitter through digital time codes, allowing for high-resolution jitter estimation with negligible testing time and eliminating the need for expensive testing equipment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If phase noise analyzer is used to test integrated circuit devices for jitter specifications, then measurement precision is improved, but testing time increases and device complexity increases
Solution Approach 1:
The clock generator circuit performs self-testing by using its own internal resources (phase detector, time-to-digital converter, frequency dividers) to measure its output jitter without requiring external phase noise analyzers. The circuit generates test signals, measures its own output, and determines pass/fail status internally, eliminating the need for expensive external equipment and reducing testing time to approximately 100 ms per device.
2Measurement precision
If phase noise analyzer is used to test integrated circuit devices, then measurement precision is improved, but device complexity and cost increase
Solution Approach 1:
The invention extracts the essential testing functionality from external phase noise analyzers and implements it directly within the clock generator circuit. By taking out the core measurement functions (phase detection, time-to-digital conversion, frequency division) and embedding them in the device under test, the system eliminates dependence on complex external equipment while maintaining measurement precision.
Solution Approach 2:
The clock generator circuit is designed to perform multiple functions: it generates clock signals, performs self-testing, and determines pass/fail status. The same circuit components used for clock generation are also utilized for jitter measurement, making the device multi-functional and eliminating the need for separate dedicated testing equipment.
3Measurement precision
If conventional testing methods are used, then measurement accuracy is maintained, but productivity decreases
Solution Approach 1:
The clock generator circuit prepares and performs the complete testing sequence internally and rapidly. By having the circuit ready to self-test immediately upon power-up or mode switching, and by performing all measurement steps (signal generation, phase detection, time-to-digital conversion, statistical analysis) in a predetermined sequence within the device itself, the system achieves high throughput without requiring external equipment setup or calibration time.
Data Source
AI summary
A method for estimating jitter of a clock-signal-under-test includes generating a phase-adjusted clock signal based on an input clock signal and a feedback clock signal using a frequency-divided clock signal. The method includes generating N digital time codes for each phase adjustment of P phase adjustments of the phase-adjusted clock signal using a reference clock signal. Each digital time code of the N digital time codes corresponds to a first edge of a clock signal based on the phase-adjusted clock signal. P is a first integer greater than zero and N is a second integer greater than zero. The method includes generating a jitter estimate using an estimated standard deviation of a distribution of edges of the clock signal based on the N digital time codes for each of the P phase adjustments.