Jitter Tolerance Measurement Using FEC Symbol Error Distribution

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Solution Overview

Problem

Current jitter tolerance measurement methods struggle to effectively represent the distribution of FEC symbol errors at different jitter amounts in a single graph, leading to complex analysis due to the need for multiple data acquisitions and graph updates.

Innovation Solution

A jitter tolerance measurement apparatus and method that classify and count FEC symbol errors for each phase modulation amount, allowing the representation of these errors in a single graph using a horizontal axis for phase modulation amount and a vertical axis for the number or ratio of codewords, with optional superimposition of bit error rate graphs and color coding for clear visualization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple data acquisitions and graph updates are performed to represent FEC symbol error distributions at different jitter amounts, then measurement completeness is improved, but analysis complexity increases

Engineering Contradiction:
Improvemeasurement completenessVSAvoidanalysis complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent combines multiple FEC symbol error distribution measurements taken at different jitter amounts into a single comprehensive graph. The graph uses the horizontal axis to represent jitter amount and the vertical axis to represent the number or ratio of codewords with a specific number of FEC symbol errors. Multiple measurement results are plotted together with different markers or line styles, allowing complete jitter tolerance characterization in one visualization rather than requiring multiple separate graphs and data acquisitions.

Inventive Principle:
Principle #5Merging (Combining)

2Measurement precision

If FEC symbol error distribution is measured and analyzed separately for each jitter amount, then measurement accuracy is improved, but measurement time increases

Engineering Contradiction:
Improvemeasurement accuracyVSAvoidmeasurement time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs preliminary classification of codewords by their FEC symbol error counts during the measurement process. As codewords are received and decoded at each jitter level, they are immediately categorized into groups based on the number of FEC symbol errors (e.g., 0 errors, 1 error, 2 errors, etc.). This pre-classification allows rapid plotting of the complete distribution when the measurement is finished, eliminating the need for time-consuming post-processing analysis of each individual measurement dataset.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If detailed FEC symbol error distribution data is collected for each jitter level, then analysis accuracy is improved, but data processing complexity increases

Engineering Contradiction:
Improveanalysis accuracyVSAvoiddata processing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent transforms the raw FEC symbol error distribution data into a standardized parameter format suitable for unified plotting. Instead of processing detailed individual codeword error patterns, the system converts measurements into counts or ratios of codewords exhibiting specific error characteristics (e.g., percentage of codewords with 0, 1, 2, or more FEC symbol errors). This parameter transformation simplifies the data structure while preserving all necessary information for accurate jitter tolerance analysis across different jitter conditions.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables clear and concise visualization of FEC symbol error distributions and bit error rate changes across varying jitter amounts, simplifying analysis and enhancing the understanding of jitter tolerance in communication standards.

Implementation Method 1

a jitter signal generator that phase-modulates the data signal to generate a jitter signal

Methodology Applied
Scientific EffectPhase modulation: Phase Modulation

Data Source

PatentUS11626944B2Jitter tolerance measurement apparatus and jitter tolerance measurement method
Publication Date: 2023.04.11 ANRITSU CORP
  • US11626944B2 patent drawing
  • US11626944B2 patent drawing
  • US11626944B2 patent drawing

AI summary

There are provided a data comparison unit that detects an FEC symbol error of a signal under test output from a DUT in accordance with an input of a jitter signal, an error counting unit that counts the number of detected FEC symbol errors for each codeword for each phase modulation amount, a codeword classification unit that classifies a plurality of codewords included in the signal under test into a plurality of groups based on the counted number of FEC symbol errors, a codeword number counting unit that counts the number of codewords in each group for each phase modulation amount, and a display control unit that controls a display of a first graph having a horizontal axis as the phase modulation amount and a vertical axis as a ratio of the number of codewords in each group, on a display screen.