Jitter Tolerance Measurement System for Data Transmission Interfaces
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Solution Overview
Problem
Traditional measurement equipment is either ineffective or too expensive to accurately measure the jitter tolerance capability of data transmission interfaces, especially when operating in clock domain crossing at high frequencies.
Innovation Solution
A measurement system comprising a signal generator, signal receiver, receiving circuit, synchronous circuit, and transmitting circuit that operate at different clock signals, allowing for error feedback to determine jitter tolerance capability, reducing costs and enabling effective measurement across clock domain crossings and high-frequency outputs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If traditional low-end measurement equipment is used, then cost is reduced, but measurement capability for clock domain crossing jitter tolerance is lost
Solution Approach 1:
The measurement system is segmented into distinct functional modules: a receiving circuit that operates at a first clock signal to capture input data and generate error signals, a synchronous circuit that synchronizes error signals across clock domains, and a transmitting circuit that operates at a second clock signal to output data with error feedback. This segmentation allows each module to be optimized independently, enabling low-cost implementation while maintaining measurement capability.
Solution Approach 2:
The synchronous circuit acts as an intermediary between the receiving circuit and transmitting circuit, bridging the clock domain crossing gap. It receives error signals from the first clock domain, synchronizes them, and delivers them to the second clock domain. This intermediary mechanism enables low-end equipment to measure jitter tolerance across clock domains without requiring expensive high-end measurement tools.
2Device complexity
If traditional measurement equipment is used, then simplicity is maintained, but effectiveness in measuring high-frequency jitter tolerance is lost
Solution Approach 1:
The system changes the clock signal parameters (frequency, phase) dynamically to match the operating conditions of the data transmission interface. The receiving circuit operates at a first clock signal frequency while the transmitting circuit operates at a second clock signal frequency, allowing the system to adapt to high-frequency operations and accurately measure jitter tolerance under various frequency conditions while maintaining reasonable system complexity.
3Measurement precision
If clock domain crossing measurement is implemented, then comprehensive jitter tolerance capability is measured, but system complexity increases
Solution Approach 1:
The measurement system is divided into three independent circuits operating at different clock domains, each with a specific function. This segmentation allows comprehensive jitter tolerance measurement across clock domains while keeping each individual circuit relatively simple and manageable, avoiding a monolithic complex system.
Solution Approach 2:
The synchronous circuit serves multiple functions: it synchronizes error signals across clock domains, manages timing relationships, and enables communication between the receiving and transmitting circuits. This multi-functionality reduces the need for additional separate components, thereby measuring comprehensive jitter tolerance capability without proportionally increasing system complexity.
Data Source
AI summary
A measurement system of a data transmission interface includes a signal generator and a signal receiver. The signal generator transmits an input data to the data transmission interface. The signal receiver receives an output data from the data transmission interface. The signal receiver measures a jitter tolerance capability of the data transmission interface according to error feedback data of the output data. The data transmission interface includes a receiving circuit, a synchronous circuit, and a transmitting circuit. The receiving circuit receives the input data and generates an error signal when a data error occurs. The synchronous circuit receives the error signal to generate an error indication signal. The transmitting circuit transmits the output data to the signal receiver and receives the error indication signal when the data error occurs, in order to generate the error feedback data in the output data according to the error indication signal.