Randomly Jittered Under-Sampling for Low-Power Signal Processing

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Solution Overview

Problem

Conventional digital signal processing methods require high sampling rates to accurately represent signals, which leads to significant CPU utilization and power consumption, especially in applications like ground fault detection, where periodic sampling rates need to be at least 10 times higher than the highest frequency component of the signal, resulting in inefficiencies and increased costs.

Innovation Solution

The implementation of randomly jittered under-sampling techniques reduces the required sampling rate by introducing aperiodic sequences of samples with randomly generated aperiodicity, allowing for efficient data acquisition and analysis while maintaining accurate waveform estimates, thereby reducing the need for complex and costly components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a periodic sampling rate 10 times higher than the highest frequency component is used, then measurement precision of the signal is improved, but CPU utilization and power consumption increase significantly

Engineering Contradiction:
Improvesignal measurement precisionVSAvoidCPU utilization and power consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies periodic action by using a pseudo-random binary sequence (PRBS) that is periodically applied to the sampling clock. This PRBS modulates the sampling instants, creating a sampling pattern that is periodic in nature but appears random to the signal being sampled. The periodic PRBS sequence allows the system to maintain a low average sampling rate while still capturing sufficient signal information for accurate measurement, thereby reducing CPU utilization and power consumption compared to conventional high-rate periodic sampling.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent changes the sampling rate parameter from a constant high value to a time-varying rate controlled by the PRBS sequence. By modulating the sampling interval according to the pseudo-random sequence, the system achieves effective signal measurement at a much lower average sampling rate. This parameter change transforms the sampling process from uniform high-rate sampling to variable-rate sampling driven by the PRBS, resolving the contradiction between measurement precision and energy consumption.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If a high sampling rate is used to accurately represent the signal shape, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improvewaveform estimation accuracyVSAvoidanalog components and signal conditioning
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent substitutes mechanical/analog signal conditioning components with a digital processing approach. Instead of using complex analog filters and signal conditioners to prepare the signal for high-rate sampling, the system uses a PRBS-modulated sampling clock combined with digital correlation processing. The digital processor correlates the sampled signal with the known PRBS sequence, effectively reconstructing the signal spectrum without requiring complex analog preprocessing. This substitution of analog components with digital processing reduces device complexity while maintaining waveform estimation accuracy.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Ease of operation

If periodic sampling is used, then ease of operation is maintained, but productivity decreases due to excessive data processing requirements

Engineering Contradiction:
Improvesampling operation simplicityVSAvoiddata acquisition efficiency
Core Design Contradiction:
Ease of operationVSProductivity

Solution Approach 1:

The patent employs feedback by using the known PRBS sequence as a reference in the digital processing stage. The sampled signal is correlated with the original PRBS sequence that controlled the sampling clock, creating a feedback mechanism that extracts signal information efficiently. This feedback approach allows the system to process the undersampled data more efficiently than conventional methods, improving productivity by reducing the computational burden while maintaining ease of operation through the structured PRBS-based sampling scheme.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS12113553B2Digital signal processing of randomly jittered under-sampled sequence
Publication Date: 2024.10.08 SCHNEIDER ELECTRIC USA INC
  • US12113553B2 patent drawing
  • US12113553B2 patent drawing
  • US12113553B2 patent drawing

AI summary

Methods/systems employ randomly jittered under-sampling to reduce a sampling rate required to convert an analog signal to a digital signal in electronic devices and other applications that perform digital signal processing on the signal. The methods/systems can greatly reduce the nominal sampling rate for such applications where RMS, peak and mean estimates of the signal are desired for both the entire band-limited signal and separate estimates for each frequency component. This can in turn result in large cost savings, as less complex and thus less expensive controllers and related components may be used to perform the sampling. As well, the methods/systems herein can provide reasonably accurate waveform estimates that allow additional cost savings in bill of materials (BOM) and printed circuit board assembly (PCBA) footprint and real-estate by eliminating the need for certain analog components, such as signal conditioning components.