Semiconductor Joint Assembly With Tapered Solder for Void-Free Bonding
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Solution Overview
Problem
Conventional joint structures between semiconductor devices often contain gaps, voids, or holes, which compromise their reliability during quality control testing due to the use of conductive materials like solder for bonding.
Innovation Solution
The development of joint structures and methods that form substantially gap-free, void-free, and hole-free bonds between semiconductor devices by carefully designing the contact pads and solder layers, with specific dimensions and shapes to ensure a planar or concave surface profile, allowing for a more reliable physical and electrical connection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional joint structures are formed using conductive materials like solder, then bonding between semiconductor devices is achieved, but gaps, voids, or holes are created that compromise reliability
Solution Approach 1:
The patent applies preliminary action by forming a planarized layer before the bonding process to pre-establish a flat surface that prevents void formation. The planarization step is performed in advance on the first substrate before bonding to the second substrate, ensuring that no gaps or voids can form during the subsequent bonding process.
Solution Approach 2:
The patent changes the physical and chemical parameters of the bonding interface by introducing a planarized layer with specific material properties. This layer modifies the surface topology from irregular to planar, and changes the material composition to ensure proper wetting and bonding without void formation, thereby improving joint reliability.
2Manufacturing precision
If contact pads are designed with specific dimensions and shapes to ensure planar or concave surface profile, then gap-free and void-free bonds are achieved, but device complexity increases
Solution Approach 1:
The patent segments the bonding structure into distinct functional layers: contact pads, planarized layer, and bonded substrates. By dividing the complex bonding process into manageable segments with specific functions, the design achieves precise control over surface topology while maintaining clarity in the overall structure.
Solution Approach 2:
The patent applies local quality by giving specific geometric characteristics to localized regions. The contact pads are designed with particular dimensions and shapes (planar or concave profiles) tailored to their specific bonding function, while other regions of the device maintain their original design, thus achieving precision without overall complexity increase.
3Reliability
If solder layer and contact pad dimensions are carefully controlled, then substantially gap-free and void-free bonds are formed, but manufacturing difficulty increases
Solution Approach 1:
The patent performs planarization as a preliminary action before bonding, which simplifies the overall manufacturing process by pre-establishing the required surface topology. This preliminary step makes subsequent bonding easier and more reliable, as the critical dimension control is performed in advance when the process is more controllable.
Solution Approach 2:
The planarized layer acts as an intermediary between the contact pads and the second substrate. This intermediate layer mediates the bonding process by providing a controlled interface that facilitates gap-free and void-free bonding, thereby simplifying the manufacturing of the overall joint structure despite the added layer.
Data Source
AI summary
A method of manufacturing a semiconductor device structure includes forming a bond or joint between a first device and a second device. The first device comprises an integrated passive device (IPD) and a first contact pad disposed over the IPD. The second device comprises a second contact pad. The first contact pad has a first surface with first lateral extents. The second contact pad has a second surface with second lateral extents. The width of the second lateral extents is less than the width of the first lateral extents. The joint structure includes the first contact pad, the second contact pad, and a solder layer interposed therebetween. The solder layer has tapered sidewalls extending in a direction away from the first surface of the first contact pad to the second surface of the second contact pad. At least one of the first surface or the second surface is substantially planar.