Joint CTE and DTE Adaptation for High-Speed Serial Lane Timing
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Solution Overview
Problem
Conventional retimers in high-speed serial communication systems are too slow in lane adaptation, failing to meet the rapid link establishment requirements of modern communication technologies like 5G, especially when using complex modulation schemes like PAM4, which exacerbates signal integrity issues due to poorer signal-to-interference and signal-to-noise ratios.
Innovation Solution
The implementation of adaptive equalizer circuitry that jointly adapts both continuous time and discrete time equalizers, using a slicer to quantify output signals and dynamically adjust filter settings based on error gradients, allowing for rapid lane adaptation and re-adaptation in high-speed serial communication systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional retimers independently adapt continuous time and discrete time equalizers iteratively, then equalizer adaptation is performed, but lane adaptation time is too slow (requiring hundreds of milliseconds) to meet 5G link establishment requirements
Solution Approach 1:
The patent merges the independent adaptation processes of continuous time equalizer (CTE) and discrete time equalizer (DTE) into a single joint adaptation process. The system performs joint adaptation by adapting the DTE at each of a plurality of filter characteristic settings of the CTE and determining a figure of merit for signals filtered by both equalizers, thereby reducing the total adaptation time from hundreds of milliseconds to under 50 milliseconds while maintaining signal integrity.
Solution Approach 2:
The system performs preliminary action by pre-establishing a set of filter characteristic settings for the CTE before full adaptation begins. During joint adaptation, the DTE is adapted at each pre-defined CTE setting, and figure of merit values are determined for each combination. This preliminary structuring of the adaptation space enables faster convergence and reduces overall lane adaptation time to meet 5G requirements.
2Productivity
If PAM4 modulation is used to achieve 56 Gbps data rate, then data rate is doubled compared to NRZ modulation, but signal-to-interference and signal-to-noise ratios deteriorate, increasing burden on equalizer performance
Solution Approach 1:
The system implements feedback by determining a figure of merit for signals filtered by both CTE and DTE at each adaptation iteration. This figure of merit serves as a feedback metric that guides the joint adaptation process, allowing the equalizers to continuously optimize their parameters based on actual signal quality measurements. The feedback mechanism enables the system to achieve the required signal integrity for PAM4 modulation at 56 Gbps despite the inherent poorer signal-to-noise ratio.
3Reliability
If more than one retimer is deployed along the link signal path, then signal conditioning is improved, but the budget allocated for each retimer's clock recovery and lane adaptation is reduced to as short as 50 milliseconds
Solution Approach 1:
The patent applies joint adaptation of CTE and DTE that reduces total adaptation time from hundreds of milliseconds to under 50 milliseconds. This time reduction enables multiple retimers to be deployed along the link while each retimer can complete its clock recovery and lane adaptation within the available 50-millisecond budget, maintaining signal conditioning quality across the entire multi-retimer chain.
Data Source
AI summary
Adaptive equalizer circuitry including both a continuous time equalizer (CTE) and a discrete time equalizer (DTE) and a method of jointly adapting the CTE and DTE in lane adaptation. Jointly adaptation of the CTE and DTE is performed by adapting the DTE at each of a plurality of filter characteristic settings of the CTE and determining a figure of merit for signals filtered by the CTE and DTE at that condition. Adaptation of the DTE may be performed by dynamically adjusting a convergence coefficient based on a history of error gradients. After a figure of merit is determined for each of the plurality of CTE filter characteristics, a CTE filter characteristic setting is then selected based on those figure of merit values, for example at a CTE setting near a midpoint of an acceptable region of figure of merit values.