Joint LDPC Decoding Using Partial Intracycle Update Sharing
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Solution Overview
Problem
Existing iterative signal processing systems in communication devices often suffer from reduced throughput due to processors needing to wait for cycle completion before sharing or using extrinsic data, leading to inefficiencies and decreased performance.
Innovation Solution
Implementing a method where iterative processors can share and apply extrinsic data intracycle, allowing for continuous processing and reducing the need for processors to wait for cycle completion, thereby enhancing the efficiency and performance of signal processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If processors wait for cycle completion before sharing extrinsic data, then data accuracy is improved, but throughput decreases
Solution Approach 1:
The patent applies preliminary action by allowing processors to share and utilize extrinsic data as soon as it becomes available during the cycle, rather than waiting for cycle completion. This enables the LDPC decoder to incorporate extrinsic information from ancillary processors mid-cycle, improving throughput while maintaining sufficient data accuracy for effective decoding.
Solution Approach 2:
The patent implements dynamics by enabling flexible, adaptive data sharing between processors during different phases of the processing cycle. The system dynamically adjusts when extrinsic data is exchanged and utilized, allowing processors to operate concurrently rather than in rigid sequential turns, thereby improving overall system throughput.
2Measurement precision
If processors operate in sequential turns, then data processing accuracy is improved, but processor utilization efficiency decreases
Solution Approach 1:
The patent applies continuity of useful action by enabling multiple processors to operate concurrently and continuously rather than in sequential turns. The LDPC decoder and ancillary processors can process data simultaneously, with extrinsic data being shared and utilized during ongoing processing cycles, eliminating idle time and improving processor utilization efficiency while maintaining processing accuracy.
Solution Approach 2:
The patent enables processors to prepare and exchange data in advance during ongoing cycles rather than waiting for cycle completion. This preliminary action allows the LDPC decoder to incorporate extrinsic information before the cycle ends, enabling continuous operation without waiting for sequential processor completion.
3Productivity
If extrinsic data is shared intracycle, then throughput is improved, but system complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the processing cycle into distinct phases where extrinsic data exchange occurs at specific intervals. This structured approach to intracycle data sharing manages complexity by organizing the flow of information between processors in a systematic manner, enabling throughput improvement without overwhelming system complexity.
Solution Approach 2:
The patent implements dynamics by creating an adaptive data sharing mechanism that adjusts the timing and amount of extrinsic data exchanged based on processing needs. This dynamic approach optimizes throughput while managing system complexity through flexible, demand-driven communication between processors rather than rigid fixed-cycle exchange.
Data Source
AI summary
Iterative signal processing. At communication hardware, a signal is received from a transmission medium. The signal has characteristics that obscure data or a signal of interest in the signal. The signal is processed at a first signal processor, which is an iterative processor that performs signal processing in cycles whereby successive cycles: improve the performance of processing of the processor itself over previous cycles, or improve the output from the processor. The signal is processed at one or more second signal processors. Extrinsic data, with respect to the first signal processor is produced as a result. The extrinsic data is provided to the first signal processor and used to counter the effects of the data or signal of interest being obscured in the signal, while the first signal processor is intracycle of a first processing cycle.