Joule Heating Crystallization of Amorphous Semiconductor Layers
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Solution Overview
Problem
Current annealing methods for crystallization processes, such as laser and rapid thermal annealing, face limitations in uniformity and cost, particularly when high temperature or high rate annealing is required for large substrates, and can lead to arc formation and physical defects during Joule heating.
Innovation Solution
A thin film transistor (TFT) fabrication method using a metal layer that applies an electric field to prevent arc formation during crystallization, where a metal layer is used to transfer heat and crystallize the semiconductor layer, with specific contact holes and electrode configurations to ensure uniform heat transfer and prevent defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If Joule heating is used for rapid annealing, then heating rate is improved, but arc formation occurs causing physical defects
Solution Approach 1:
A metal layer is introduced as an intermediary between the Joule heating source and the semiconductor layer. The metal layer absorbs the Joule heat and transfers it to the semiconductor layer, preventing direct arc formation on the substrate while maintaining rapid heating capability. This mediator approach resolves the contradiction by decoupling the heating mechanism from the harmful arc effect.
Solution Approach 2:
The metal layer serves as a sacrificial element that can be consumed or modified during the annealing process. By using a relatively thin metal layer that can be rapidly heated and discarded or integrated into the final structure, the process achieves high heating rates without the need for expensive protective equipment against arc damage.
2Speed
If laser annealing is used for rapid surface annealing, then heating speed is improved, but uniformity deteriorates due to beam overlap issues
Solution Approach 1:
The patent replaces the optical laser heating system with an electrical Joule heating system applied through a metal layer. This substitution eliminates the beam overlap and intensity distribution issues inherent in laser scanning, providing more uniform heat distribution across the substrate while maintaining rapid heating capability.
3Manufacturing precision
If RTA method is used for annealing, then temperature uniformity is improved, but heating rate is limited to about 400°C/sec
Solution Approach 1:
The patent merges the advantages of both RTA (temperature uniformity through radiant heating) and Joule heating (high heating rate) by using a metal layer that distributes Joule heat uniformly across the semiconductor layer. The metal layer acts as a heat distribution network that combines the high power density of Joule heating with the uniform temperature distribution characteristic of RTA.
4Manufacturing precision
If high temperature annealing is required for large substrates, then crystallization quality is improved, but processing complexity increases
Solution Approach 1:
The patent changes the heating mechanism from external radiant heating (RTA) or focused heating (laser) to in-situ Joule heating through a metal layer. This parameter change allows uniform high-temperature annealing across large substrates by distributing the heating source throughout the structure, simplifying the processing system while maintaining crystallization quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively crystallizes semiconductor layers without arc formation, reducing defects and enabling higher heating rates, thus improving the uniformity and efficiency of the annealing process for larger substrates.
Implementation Method 1
A rapid annealing method, which applies an electrical field to a conductive layer and generates Joule heat, can rapidly anneal a selected material by transferring high heat.
Implementation Method 2
a metal layer capable of preventing an arc formation during the crystallization of an amorphous layer, as the result of heat transfer from the metal layer
Data Source
AI summary
A method of fabricating a thin film transistor includes patterning the amorphous semiconductor layer to form an amorphous semiconductor layer pattern, forming a gate electrode corresponding to the amorphous semiconductor layer pattern on a gate insulating layer, forming an interlayer insulating layer on the entire surface of the substrate, forming a first contact hole partially exposing the amorphous semiconductor layer pattern, forming a second contact hole partially exposing the gate electrode, and forming a metal layer on the entire surface of the substrate. The method also includes applying an electrical field to the metal layer such that a semiconductor layer is formed by crystallization of the amorphous semiconductor layer pattern, and patterning the metal layer to form source and drain electrodes that are insulated from the gate electrode and that are electrically connected with the semiconductor layer through the first contact hole.