IC Testing via JTAG Calibration Data Injection
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Solution Overview
Problem
Existing methods for testing and calibrating integrated circuits, such as SoCs, require cumbersome procedures involving emulators or increased memory size, and often necessitate continuous voltage supply for volatile memory, which complicates the design and efficiency of the testing process.
Innovation Solution
A system and method that utilize a microcontroller with a central processing unit, volatile memory, and an interface to stop and start program execution, allowing data and instruction sequences to be written directly into the volatile memory via the interface, enabling efficient calibration and testing without the need for external emulators or continuous voltage supply.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If an emulator sensing head is used to access and write calibration data, then data can be written to CALRAM, but the device complexity increases due to requiring external emulator equipment
Solution Approach 1:
The patent extracts the calibration functionality from external emulator equipment and integrates it directly into the microcontroller. The JTAG interface, originally designed for debugging, is repurposed to write calibration data directly to the CALRAM memory area, eliminating the need for external emulator sensing heads while maintaining calibration capability.
Solution Approach 2:
The JTAG interface is given multiple functions: it serves both as a debugging interface and as a calibration data input interface. This multi-functionality allows the same hardware interface to perform both traditional debugging tasks and the new calibration function, reducing overall device complexity.
2Ease of operation
If instruction sequences are provided for calibration mode and data copying, then calibration can be performed, but the non-volatile memory size must be increased to store these sequences
Solution Approach 1:
The patent prepares the calibration environment in advance by setting up the JTAG interface and configuring the CALRAM memory area before calibration begins. The volatile memory is pre-configured with the appropriate memory map, eliminating the need to store lengthy initialization sequences in non-volatile memory during actual calibration operations.
Solution Approach 2:
The system uses its own existing resources (JTAG interface, volatile memory, and memory management unit) to perform calibration functions. The MMU is already capable of mapping memory addresses, and the JTAG interface is already capable of data input, so no additional instruction sequences are needed to activate these functions - they are self-sufficient for calibration.
3Adaptability or versatility
If volatile memory is used for calibration data, then data can be modified during calibration, but continuous voltage supply is required to maintain data
Solution Approach 1:
The patent employs a periodic action pattern where the microcontroller enters sleep mode (no voltage supply to volatile memory) during normal operation, and only activates power to the volatile memory and JTAG interface when calibration is actually needed. This allows data modification capability when required while minimizing overall energy consumption.
Solution Approach 2:
The system accepts that volatile memory data will be lost when power is removed, and recovers the necessary calibration data by rewriting it from non-volatile storage when needed. This trade-off allows the system to use power-efficient volatile memory for active calibration work while accepting data loss between calibration sessions.
Data Source
AI summary
A system and method for testing an integrated circuit is disclosed. One embodiment includes at least one central processing unit, at least one volatile memory area, and an interface, wherein the volatile memory area is connected to the interface to be written thereto by the interface. The system includes a test device connected with the integrated circuit which is configured to stop the program execution, write data in the volatile memory by using the interface, and start the program execution.