JTAG Clock Frequency Measurement Using Dual Counters

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Solution Overview

Problem

Existing clock frequency measurement methods in electronic systems are often costly and require specialized equipment, failing to detect clock source issues early in the manufacturing process, leading to potential defects and increased production costs.

Innovation Solution

A JTAG-based system that integrates a counting mechanism to measure input clock frequency using existing JTAG infrastructure, leveraging counters to determine frequency accurately without additional hardware, enabling detection of clock source errors early in production.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If specialized equipment is used for clock frequency measurement, then measurement precision is improved, but device complexity and cost increase

Engineering Contradiction:
Improveclock frequency measurement precisionVSAvoidtesting equipment complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The JTAG interface, originally designed for testing and debugging purposes, is extended to perform clock frequency measurement functionality. By adding a counter mechanism to the existing JTAG infrastructure, the system achieves multi-functionality without requiring separate specialized measurement equipment, thereby resolving the contradiction between measurement precision and device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The device under test performs its own clock frequency measurement using internal counters and the existing JTAG interface. The device counts clock cycles autonomously during JTAG operations and reports the measured frequency back through the same interface, eliminating the need for external specialized measurement equipment while maintaining accurate measurement capability

Inventive Principle:
Principle #25Self-service

2Measurement precision

If specialized equipment is used for clock frequency measurement, then measurement precision is improved, but manufacturing cost increases

Engineering Contradiction:
Improveclock frequency measurement precisionVSAvoidmanufacturing cost
Core Design Contradiction:
Measurement precisionVSEase of manufacture

Solution Approach 1:

The JTAG interface serves dual purposes: traditional testing/debugging functions and clock frequency measurement. This eliminates the need for separate specialized measurement equipment in manufacturing test setups, reducing overall testing system cost while maintaining precise measurement capability through the same interface

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The invention uses software-based counting and calculation logic implemented in the existing JTAG infrastructure rather than expensive hardware frequency counters. The measurement is performed through software control of existing counters and mathematical calculation, providing a low-cost alternative to specialized hardware equipment

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Measurement precision

If traditional measurement methods are used, then measurement precision is maintained, but detection timing is delayed

Engineering Contradiction:
Improveclock frequency measurement precisionVSAvoiddetection timing
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The clock frequency measurement is integrated into the JTAG initialization and setup phase, which occurs early in the manufacturing process before other testing operations. By performing the measurement during the initial JTAG configuration stage, the system detects clock source issues early without delaying the overall testing schedule, while maintaining precise measurement through the counter mechanism

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12571842B2JTAG-based apparatus and method for input clock frequency measurement
Publication Date: 2026.03.10 XILINX INC
  • US12571842B2 patent drawing
  • US12571842B2 patent drawing
  • US12571842B2 patent drawing

AI summary

In an implementation, a method may include receiving an input clock at an input pin of a device, the device having a Joint Test Action Group (JTAG) test access port (TAP). The method may also include counting a first number of cycles of a reference clock using a first counter. The method may furthermore include simultaneously counting a second number of cycles of the input clock received at the input pin using a second counter. The method may in addition include calculating a frequency of the input clock based on the counted first number of cycles of the reference clock, the counted second number of cycles of the input clock, and a frequency of the reference clock.