JTAG Debug Register for Microcontroller Program Counter Access
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Solution Overview
Problem
Conventional microcontroller debugging systems require complex procedures and explicit knowledge of CPU operational codes to access program counter values, especially when the CPU is halted, which complicates the debugging process and increases hardware costs.
Innovation Solution
A system that allows direct communication between a JTAG interface and a debug register to retrieve program count values both when the microcontroller is halted and executing, using a debug program counter that receives the program count after an instruction is executed, simplifying access and reducing the need for explicit register knowledge and hardware complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the CPU is halted in debug mode to access program counter values, then the program counter can be observed, but the debugging process becomes complicated and requires explicit knowledge of CPU operational codes and register architecture
Solution Approach 1:
The patent introduces a debug register as an intermediary component that the JTAG interface can directly access. Instead of requiring the debugger to know CPU operational codes and manually transfer PC values through complex instruction sequences, the debug register serves as a mediator that automatically holds and exposes the current PC value to the JTAG interface, simplifying the debugging process while maintaining accurate program counter observation
Solution Approach 2:
The patent extracts the program counter value from the CPU's internal register structure and places it into a separate debug register that is specifically designed for external interface access. This extraction allows the JTAG interface to read PC values directly without needing to interact with the CPU's instruction execution mechanisms, thereby eliminating the need for explicit knowledge of CPU operational codes
2Measurement precision
If the program counter value is transferred from processor register to debug register using CPU instructions, then the JTAG interface can access the PC value, but the procedure is complicated and requires knowledge of instruction operational codes
Solution Approach 1:
The debug register acts as an intermediary that eliminates the need for complex instruction-based transfer procedures. The JTAG interface can directly read from this mediator register without requiring the CPU to execute instruction sequences that move data from processor registers to accessible locations, thereby reducing device complexity in the access procedure
Solution Approach 2:
The patent extracts the PC value access function from the CPU's instruction execution path and creates a separate, dedicated access mechanism through the debug register. This extraction removes the dependency on knowing instruction operational codes and simplifies the overall access procedure
3Speed
If a parallel trace port is used for high bandwidth features, then real-time capture of program count values is achieved, but hardware complexity and cost increase
Solution Approach 1:
The patent makes the JTAG serial interface multi-functional by enabling it to access the debug register that holds the current PC value. Instead of requiring a separate parallel trace port for PC observation, the existing JTAG interface is enhanced to serve dual purposes: instruction execution/communication and real-time PC value capture, thereby reducing hardware complexity while maintaining real-time capture capability
Solution Approach 2:
The patent merges the function of PC value capture with the existing JTAG interface by introducing the debug register as a shared resource. The debug register can be accessed by both the JTAG interface for real-time PC monitoring and by the CPU for normal operation, eliminating the need for separate hardware and reducing overall system complexity
Data Source
AI summary
A system for debugging a device under test may include a processor register with a program count and a debug program register that receives the program count upon execution of an instruction by a processor. In one implementation, a microcontroller under test by a debugger is accessed using a serial interface, such as a JTAG interface. The interface can communicate directly with a debug register to retrieve program count values, both when the microcontroller is halted and when it is executing instructions. The polling interval to retrieve the program count values may be adjusted by a user of the debugger based on considerations such as bandwidth and accuracy. The microcontroller may transmit the program count value to the debug register from a processing register that is not accessible to the debugger.