JTAG Bus Routers Using Falling TCK Edges to Cut Access Time
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Solution Overview
Problem
Existing JTAG scan access methods in integrated circuit systems face issues with extended access times due to serial connections and board removal problems, and existing JTAG routers either lengthen access times or require complex and costly encoding/decoding processes.
Innovation Solution
A JTAG router device that operates on the falling edge of the TCK signal, allowing direct access to JTAG device strings without extending access time and eliminating the need for complex encoding/decoding, using a simplified Falling Edge Router (FER) that addresses and selects device strings during inactive JTAG bus operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If serial JTAG connections are used to access multiple IC devices, then all devices can be accessed through a single controller, but access time is extended due to the number of serial bits that must be shifted
Solution Approach 1:
The system is divided into multiple independent JTAG domains, each with its own controller. This allows parallel access to multiple device strings simultaneously, eliminating the sequential access bottleneck of traditional serial connections while maintaining the ability to access numerous devices across multiple boards.
2Adaptability or versatility
If JTAG routers are used to enable direct access to individual boards, then board removal does not disable connections, but the routers lengthen access times and require complex encoding/decoding processes
Solution Approach 1:
Each JTAG domain operates independently with its own controller and device strings. The system uses self-contained domains that do not require complex routing or encoding/decoding mechanisms. When a board is removed, other domains continue to function independently, providing automatic fault isolation without requiring complex reconfiguration or encoding schemes.
3Adaptability or versatility
If JTAG routers are used to enable direct access to individual boards, then board removal does not disable connections, but access times are lengthened
Solution Approach 1:
The system divides JTAG resources into separate independent domains, allowing simultaneous access to multiple device strings across different boards without sequential delays. This segmentation eliminates the access time penalty associated with traditional JTAG routers while maintaining board removal tolerance through domain independence.
Solution Approach 2:
Multiple JTAG domains can operate simultaneously and independently, allowing continuous parallel access to multiple device strings. This eliminates the sequential access delays inherent in router-based systems, as each domain maintains its own continuous access path to the controller without requiring router intervention or time-multiplexing.
Data Source
AI summary
A falling edge controller includes a controller having an inverted TCK (Test Clock) input, a TMS (Test Mode Select) input, a shift register control output, an update register control output, and a shift output; a shift register having a TDI (Test Data In) input, a shift register control input coupled to the shift register control output, address inputs, a select input, address and select outputs, and a TDO (Test Data Out) output; an update register having address and select inputs coupled to the address and select outputs, an update register control input coupled to the update register control output, address outputs coupled to the address inputs, and a select output coupled to the select input; and address circuitry having address inputs coupled to the address outputs, and having an enable output.