JTAG Hub Sharing Interface Among FPGA Partitions
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Solution Overview
Problem
In field programmable gate arrays (FPGAs), existing technologies face challenges in sharing a single Joint Test Action Group (JTAG) interface among multiple partitions, limiting the ability of JTAG-based logic in partitions other than the root partition to access and utilize the interface for system-level debugging.
Innovation Solution
A JTAG hub is created in a single partial reconfiguration partition, allowing system-level debugging endpoints in all partitions to connect to the JTAG hub via SLD endpoint interfaces, enabling multiple partitions to share and use the JTAG interface by synthesizing or recompiling portions of the hub and interfaces when endpoints change.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a single JTAG hub is created in the root partition to enable JTAG-based logic to share the single JTAG interface, then JTAG-based logic in the root partition can access the interface, but JTAG-based logic in other partitions cannot share the single JTAG interface
Solution Approach 1:
The patent divides the FPGA into multiple partitions (root partition and additional partitions) and creates separate JTAG hubs in each partition. This segmentation allows JTAG-based logic in any partition to access the JTAG interface by routing through its local hub, resolving the limitation where only root partition logic could access the interface.
Solution Approach 2:
The patent introduces partition-specific JTAG hubs as intermediary components between the single physical JTAG interface and JTAG-based logic in different partitions. Each hub acts as a local mediator that receives JTAG commands and routes them to the appropriate logic within its partition, enabling multi-partition access without requiring direct connection from each partition to the interface.
2Adaptability or versatility
If JTAG-based logic is added or removed in other partitions requiring recompilation, then the partition can be recompiled to account for changes, but the recompilation process becomes complex and time-consuming
Solution Approach 1:
The patent enables independent recompilation of individual partitions by maintaining separate JTAG hub instances in each partition. When JTAG-based logic changes in one partition, only that partition needs to be recompiled rather than the entire device, significantly reducing recompilation time and improving adaptability.
Solution Approach 2:
The patent pre-establishes the JTAG hub infrastructure in each partition during the initial configuration phase. This preliminary setup creates a ready-to-use framework that allows rapid addition, removal, or modification of JTAG-based logic in any partition without requiring extensive reconfiguration or full-system recompilation.
Data Source
AI summary
An integrated circuit device includes a first partition and a second partition. The integrated circuit device also includes a Joint Test Action Group (JTAG) system that controls at least a portion of the integrated circuit device via multiple logic signals. The JTAG system includes a JTAG interface receives the multiple logic signals. The JTAG system also includes a JTAG hub instantiated in the first partition and being communicatively coupled to the JTAG interface. The JTAG system further includes JTAG-based logic instantiated in the second partition. The integrated circuit device further includes an interface instantiated in the first partition configured to communicatively couple the JTAG hub to the JTAG-based logic.