Dynamic JTAG Pin Sharing for High Throughput Testing
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Solution Overview
Problem
Existing JTAG testing methods face limitations in data throughput due to constrained pin counts on integrated circuits, leading to increased test time and resource utilization, particularly when multiple successive tests require power-on-reset cycles, which can result in significant overhead.
Innovation Solution
The integration of a pin share circuit that allows the TMS or TRST pins to be shared for both finite state machine control and scan circuit data, enabling test data transfer without requiring power-on-reset, thereby maintaining state machine control while using the pins for additional data input during testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional JTAG testing methods are used with dedicated pins for each function, then pin functionality is well-defined and reliable, but data throughput is limited and test time increases
Solution Approach 1:
The patent implements pin share circuits that allow JTAG pins (TMS, TRST, TDO) to dynamically switch between traditional JTAG control functions and scan circuit data input functions. This multi-functionality enables additional test data to be input through existing pins without requiring extra pin connections, thereby increasing data throughput while maintaining reliable pin functionality through controlled mode switching.
2Reliability
If multiple successive tests are performed, then comprehensive testing coverage is achieved, but power-on-reset cycles are required between tests, increasing overhead by up to 38%
Solution Approach 1:
The patent implements state machine control that maintains the IC in a ready state between tests, performing preliminary setup and configuration during the first test. This allows subsequent tests to proceed without requiring full power-on-reset cycles, as the state machine and pin share circuits are already initialized and configured, thereby reducing overhead while maintaining comprehensive testing coverage.
3Adaptability or versatility
If all JTAG pins are used for their dedicated functions, then JTAG control and testing are reliable, but additional test data cannot be input without increasing pin count
Solution Approach 1:
The patent enables existing JTAG pins to serve dual purposes: traditional JTAG control signals and scan circuit data input. The pin share circuits dynamically route pin functions based on test mode, allowing the same physical pins to accept additional test data without increasing the pin count, thereby enhancing adaptability while maintaining device simplicity.
Data Source
AI summary
An integrated circuit with functional circuitry and testing circuitry, the testing circuitry having a state machine operable in a plurality of different states. The integrated circuit also has a pin for receiving a signal, wherein the state machine is operable to transition between states in response to a change in level of the signal. Circuitry couples the signal of the pin, in a first level, to the state machine in a first time period for causing the state machine to enter a predetermined state, and circuitry maintains the signal in the first level to the state machine in a second time period for maintaining the state machine in the predetermined state. Also during the second time period, circuitry couples data received at the pin to a destination circuit other than the state machine, wherein the destination circuit is operable to perform plural successive scan tests using data from the pin without a power on reset of the functional circuitry.