JTAG TAP Circuit Continuous Data Shift for Memory Write Efficiency
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Solution Overview
Problem
Existing JTAG transmission systems are inefficient due to serial data transmission, requiring repeated operations for each piece of data, making it time-consuming to transmit multiple data pieces to a device's memory.
Innovation Solution
A JTAG transmission system with a slave unit including a TAP circuit and memory interface controller, allowing continuous data package reception by maintaining the TAP circuit in a data shift status, reducing redundant operations and improving transmission efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the TAP circuit receives mode selection signals and data in serial manner for each piece of data, then the interface operation is simple and reliable, but the transmission time increases significantly due to repeated operations
Solution Approach 1:
The patent maintains the TAP circuit in a continuous data shift status to receive multiple data pieces without exiting and re-entering the shift status for each data piece. This continuous operation eliminates the repeated mode switching overhead, significantly reducing transmission time while maintaining the reliability of the serial interface protocol
Solution Approach 2:
The patent enters the data shift status once before transmitting multiple data pieces, preparing the TAP circuit in advance for continuous data reception. This preliminary action avoids the need to repeatedly configure and switch the circuit state for each individual data piece
2Manufacturing precision
If the TAP circuit switches among different statuses to receive and store each piece of data, then the data can be accurately stored to memory according to address, but the repeated operations make the process time-consuming
Solution Approach 1:
The patent keeps the TAP circuit in a continuous data shift status throughout the transmission of multiple data pieces, eliminating the repeated exit and re-entry operations. This maintains data storage accuracy through proper status management while dramatically improving transmission efficiency by avoiding redundant status switching
Solution Approach 2:
The patent combines multiple data transmission operations into a single continuous data shift status session. Instead of separately entering and exiting the shift status for each data piece, the system merges these operations into one continuous process, reducing overhead while maintaining data integrity
Data Source
AI summary
A joint test action group transmission system includes a host terminal and a slave terminal. The slave terminal includes a test access port (TAP) circuit, an internal memory, and a memory interface controller. The TAP circuit includes a test data register set. The memory interface controller stores the data received from the TAP circuit to the internal memory. The host terminal transmits a set of download instruction bits to the TAP circuit to have the TAP circuit select the test data register set, and have the TAP circuit enter a data shift status to receive a data package through the test data register set. During the process of receiving the data package, the TAP circuit remains in the data shift status to receive the address and at least one piece of data stored in the data package continuously.