Junction Diode Program Selector for Compact OTP Memory
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Solution Overview
Problem
Conventional programmable resistive memory devices, such as those using electrical fuses and phase change materials, face challenges in reducing cell size and cost due to the need for large program selectors and complex fabrication processes, particularly in CMOS logic processes.
Innovation Solution
The use of P+/N well junction diodes as program selectors in programmable resistive devices, which can be fabricated using standard CMOS logic processes, allowing for smaller cell sizes and reduced costs without additional processing steps, and can be integrated into various technologies like Silicon-On-Insulator (SOI) and FinFET.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If conventional program selectors (such as large transistors or complex diode structures) are used in programmable resistive memory devices, then the programming capability is sufficient, but the cell size becomes large and fabrication complexity increases
Solution Approach 1:
The patent merges the program selector and read selector functions into a single junction diode structure. The diode serves dual purposes: it enables programming by conducting high current during programming mode and enables reading by conducting current during read mode. This consolidation eliminates the need for separate program and read selector structures, thereby reducing cell size and simplifying fabrication processes while maintaining both programming and reading capabilities
Solution Approach 2:
The junction diode is designed to perform multiple functions within a single structure. It acts as both the program selector (controlling programming current) and the read selector (controlling read current) depending on the operating mode. This multi-functionality reduces the number of components needed per cell, directly addressing the contradiction between cell size and functional capability
2Ease of manufacture
If standard CMOS processes are used without additional processing steps, then fabrication cost is reduced and ease of manufacture is improved, but the ability to implement advanced selector structures is limited
Solution Approach 1:
The patent designs the junction diode to be fabricated using existing CMOS process steps without requiring additional dedicated processing stages. The diode structure utilizes standard CMOS materials and fabrication techniques that are already present in the manufacturing line. This self-service approach allows the advanced selector functionality to be integrated into standard CMOS processes, improving ease of manufacture while maintaining technology integration flexibility
Solution Approach 2:
The invention implements selector structures by modifying parameters within existing CMOS processes rather than introducing entirely new process steps. By adjusting doping profiles, junction depths, and geometric parameters of standard CMOS components, the patent achieves advanced diode-based selector functionality using conventional fabrication equipment and processes, thereby improving ease of manufacture while maintaining adaptability
3Area of moving object
If junction diodes are used as program selectors, then cell size is reduced and fabrication is simplified, but additional processing steps may be required
Solution Approach 1:
The patent merges the formation of the junction diode with existing CMOS fabrication steps. The diode structure is created by utilizing and modifying standard CMOS process steps rather than adding completely new process stages. This merging approach reduces cell size while minimizing the impact on fabrication process simplicity
Solution Approach 2:
The invention achieves junction diode formation by changing parameters within existing CMOS processes, such as doping concentrations, junction depths, and thermal processing conditions. These parameter modifications allow the creation of compact diode structures using standard fabrication equipment, reducing cell size while maintaining reasonable fabrication process simplicity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of smaller, cost-effective programmable resistive memory cells that can be easily integrated into standard CMOS processes, reducing the complexity and cost of fabrication while maintaining efficient programming capabilities.
Implementation Method 1
a program selector, which can be a P+/N well junction diode
Implementation Method 2
the resistive element can be programmed by applying voltages to the first and second supply voltage lines to thereby change the resistance into a different logic state
Data Source
AI summary
Junction diodes fabricated in standard CMOS logic processes can be used as program selectors for One-Time Programmable (OTP) devices, such as electrical fuse, contact/via fuse, contact/via anti-fuse, or gate-oxide breakdown anti-fuse, etc. The OTP device has at least one OTP element coupled to at least one diode in a memory cell. The diode can be constructed by P+ and N+ active regions in a CMOS N well, or on an isolated active region as the P and N terminals of the diode. The isolation between P+ and the N+ active regions of the diode in a cell or between cells can be provided by dummy MOS gate, SBL, or STI/LOCOS isolations. The OTP cell can have a MOS in series with the OTP element as a read selector. The OTP element can be polysilicon, silicided polysilicon, silicide, polymetal, metal-0, metal, metal alloy, local interconnect, thermally isolated active region, CMOS gate, or combination thereof.