Semiconductor Junction Separator for Insulation Reliability

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Solution Overview

Problem

In semiconductor devices with buried gate structures, the reduction in channel length and increased integration lead to insufficient electrical insulation between source and drain regions, causing electrical shorts and alignment issues during contact hole formation, particularly due to the reduction in occupation area and gap distance between neighboring regions.

Innovation Solution

Incorporating a junction separator with higher etch resistance than the device isolation layer on the device isolation layer to ensure sufficient insulation between source and drain regions, preventing electrical shorts and misalignment-related issues by maintaining effective electrical insulation even during cell size reduction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the occupation area of cell transistor is reduced to increase integration degree, then the chip size can be reduced, but the area of source/drain regions is extremely reduced causing electrical short between bit line contact and storage node contact

Engineering Contradiction:
Improvechip sizeVSAvoidelectrical insulation between source and drain regions
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The device isolation layer is segmented into two distinct layers: a first device isolation layer (shallow trench isolation) and a second device isolation layer (deep trench isolation). This segmentation allows each layer to perform specific insulation functions, with the deep trench isolation providing enhanced electrical insulation between source and drain regions even when the occupation area is reduced for high integration.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The isolation structure transitions from a single-layer planar approach to a multi-layer vertical approach. The deep trench isolation extends vertically deeper into the substrate, creating additional insulation distance in the depth dimension. This vertical dimensionality change ensures sufficient electrical insulation between source and drain regions while allowing the horizontal occupation area to be reduced for higher integration density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If the gap distance between neighboring source and drain regions is reduced, then the occupation area is reduced, but it becomes difficult to obtain sufficient aligning margin when forming contact holes

Engineering Contradiction:
Improveoccupation areaVSAvoidaligning margin for contact hole formation
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The deep trench isolation structure is formed preliminarily before contact hole formation. By pre-establishing the deep trench isolation with its extended vertical walls, sufficient aligning margin is created in advance. The vertical sidewalls of the deep trench provide robust physical boundaries that guide subsequent contact hole alignment, ensuring manufacturing precision even when the horizontal gap distance between source and drain regions is reduced.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The deep trench isolation acts as a flexible structural boundary that can accommodate reduced horizontal spacing. The vertical sidewalls of the deep trench provide a three-dimensional constraint that maintains alignment margins without requiring increased horizontal gap distance, enabling compact layout while preserving manufacturing tolerances.

Inventive Principle:
Principle #30Flexible shells and thin films

3Ease of manufacture

If the device isolation layer is removed during etching process for forming contact hole, then the contact hole can be formed, but the electrical insulation between drain region and neighboring source region becomes insufficient

Engineering Contradiction:
Improvecontact hole formationVSAvoidelectrical insulation between source and drain regions
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The deep trench isolation structure serves as a beforehand cushioning measure against potential electrical shorting. Even if the shallow trench isolation is partially removed during contact hole etching, the deep trench isolation remains as a protective barrier, preventing electrical short between source and drain regions. This prior cushioning ensures that manufacturing processes can proceed without compromising electrical insulation reliability.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The deep trench isolation acts as an intermediary protective layer between the shallow trench isolation and the substrate. During contact hole formation, when the shallow trench isolation may be removed, the deep trench isolation mediates by maintaining the electrical insulation function. This intermediary structure ensures that the essential insulation function is preserved even when the upper isolation layer is modified during manufacturing.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The junction separator effectively prevents electrical connections between bit line and storage node contacts, enhancing the operational reliability and stability of semiconductor devices by maintaining insulation and alignment margins despite high integration and reduced cell sizes.

Implementation Method 1

the junction separator may have an etch resistance greater than that of the device isolation layer

Methodology Applied
Scientific EffectEtching selectivity:

Data Source

PatentUS20180233506A1Semiconductor device and method of manufacturing the same
Publication Date: 2018.08.16 SAMSUNG ELECTRONICS CO LTD
  • US20180233506A1 patent drawing
  • US20180233506A1 patent drawing
  • US20180233506A1 patent drawing

AI summary

A semiconductor device includes a substrate having an active region defined by a device isolation layer and at least a gate trench linearly extending in a first direction to cross the active region, the active region having a gate area at a bottom of the gate trench and a junction area at a surface of the substrate. The device further may include a first conductive line filling the gate trench and extending in the first direction, the first conductive line having a buried gate structure on the gate area of the active region. The device also may include a junction including implanted dopants at the junction area of the active region, and a junction separator on the device isolation layer and defining the junction. The junction separator may be formed of an insulative material and have an etch resistance greater than that of the device isolation layer.