High-Voltage Junction Terminal Doping for Preferential ESD Breakdown

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Solution Overview

Problem

Existing high-voltage junction terminal structures face challenges in efficiently discharging electrostatic charges during electrostatic discharge events, leading to potential damage to adjacent transistors.

Innovation Solution

The proposed semiconductor structure incorporates a high-voltage junction terminal structure with a well of higher doping concentration, and transistors with inserted gaps in their wells, to reduce the breakdown voltage of the parasitic diode and increase the breakdown voltage of the transistors, respectively.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional high-voltage junction terminal structure is used, then the circuit area is reduced, but the breakdown voltage remains high preventing effective electrostatic charge discharge

Engineering Contradiction:

Improveelectrostatic charge discharge capabilityVSAvoidjunction terminal structure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating a multi-zone doping structure within the junction terminal region. Different zones (first well, second well, third well with different doping concentrations) are established to achieve varying electrical properties in different areas, enabling the parasitic diode to have optimized breakdown characteristics locally while maintaining overall circuit integration.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent changes the doping concentration parameter across different wells to control the breakdown voltage. By establishing a doping concentration relationship where the first doping concentration is lower than the second, which is lower than the third, the parasitic diode's breakdown voltage is adjusted to a specific range (5V-15V) that enables effective electrostatic discharge while protecting adjacent transistors.

Inventive Principle:

Principle #35Parameter changes

2Reliability

If the parasitic diode breakdown voltage is reduced, then electrostatic charge discharge is enabled, but adjacent transistors may be damaged if their breakdown voltage is not sufficiently higher

Engineering Contradiction:

Improveelectrostatic charge discharge capabilityVSAvoidtransistor damage risk

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent precisely controls the doping concentration parameters to establish a hierarchical breakdown voltage structure. The first doping concentration is set lower than the second, which is lower than the third, creating a breakdown voltage gradient that ensures the junction terminal parasitic diode breaks down first (5V-15V) while adjacent transistor parasitic diodes maintain higher breakdown voltages (>5V), preventing transistor damage during ESD events.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent designs the doping structure in advance to create a protective buffer zone. By establishing the multi-zone doping configuration before ESD events occur, the structure pre-establishes a preferred discharge path that cushions adjacent transistors from direct ESD damage, ensuring their breakdown voltage remains sufficiently higher than the junction terminal parasitic diode.

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration allows for preferential breakdown of the parasitic diode during electrostatic discharge events, effectively discharging electrostatic charges to the ground and protecting adjacent transistors from damage.

Implementation Method 1

When an electrostatic discharge event occurs at the first high voltage VB, electrostatic charge expelled through the junction diode JD helps to protect the high-voltage integrated circuit 100 from burning out

Methodology Applied

Scientific EffectElectrostatic discharge: Electrostatic Discharge

Implementation Method 2

it is necessary to ensure that the electrostatic charge is expelled to the ground terminal GND through the junction diode JD

Methodology Applied

Scientific EffectBreakdown voltage: Avalanche Breakdown

Data Source

PatentUS20250072120A1High-voltage junction terminal structure with reduced triggering voltage of electrostatic discharge and high-voltage transistor with increased trigger voltage of electrostatic discharge

Publication Date: 2025.02.27 NUVOTON

AI summary

A semiconductor structure includes a first well, a second well, a first doping region, a second doping region, a field oxide layer, a third well, and a fourth well. The first well is N-type. The second well is P-type, adjacent to the first well and in contact with the first well at an interface. The first doping region is N-type and deposited in the first well. The second doping region is P-type and deposited in the second well. The field oxide layer is formed in the first well and deposited between the first doping region and the second doping region. The third well is N-type, formed in the first well, and deposited below the field oxide layer. The fourth well is N-type, formed in the first well, and deposited below the field oxide layer.