Silicon-Compatible Junctionless FET Using Blocking Layer
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Solution Overview
Problem
Conventional field effect transistors face issues with leakage current and high fabrication costs due to the need for expensive SOI substrates and high doping levels, which restrict high-frequency operation and power efficiency.
Innovation Solution
A compound junctionless field effect transistor is developed using a bulk silicon substrate with a blocking semiconductor layer and an active layer made of materials with different energy bandgaps and doping types, replacing the buried oxide and enabling higher electron mobility, thus reducing leakage current and fabrication costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional MOSFET structure with source and drain regions is used, then current control capability is achieved, but leakage current is induced in the depletion region due to hot carrier collision and tunneling
Solution Approach 1:
The invention extracts and eliminates the source and drain regions from the transistor structure, transitioning from a junction-based MOSFET to a junctionless field-effect transistor (JLFET). By removing the doped source/drain regions that create depletion regions, the patent eliminates the root cause of leakage current while maintaining current control through the gate electrode alone
Solution Approach 2:
Instead of using doped source/drain regions to create current control (conventional approach), the invention inverts the approach by using an undoped or lightly-doped channel region with gate-controlled carrier injection. The current control is achieved by modulating the barrier height at the source-channel interface through gate voltage, rather than through junction formation
2Object-generated harmful factors
If a junctionless structure without source/drain regions is used, then leakage current is reduced, but fabrication costs increase due to requiring expensive SOI substrates
Solution Approach 1:
The invention replaces the expensive SOI substrate with a bulk silicon substrate, using a cheaper, more readily available material. The patent achieves junctionless operation on bulk silicon through selective epitaxial growth of the active layer and appropriate doping schemes, eliminating the need for costly suspended gate or BOX structures while maintaining low leakage current
Solution Approach 2:
The invention changes the doping parameters and material composition to enable junctionless operation on bulk silicon. By using ultrathin epitaxial layers with controlled doping concentrations and forming ohmic contacts through metal-semiconductor junctions, the patent achieves low leakage current without requiring SOI substrates, thus reducing fabrication costs
3Reliability
If high doping concentration is used in the active layer, then device operation is enabled, but electron mobility is remarkably reduced
Solution Approach 1:
The invention applies local quality by creating spatially varying doping concentrations: the active layer has ultralow doping (10^16-10^18 atoms/cm³) in the channel region to maintain high electron mobility, while higher doping is applied locally at the source/drain contact regions to ensure good ohmic contact. This localized doping strategy enables device operation without sacrificing bulk electron mobility
Solution Approach 2:
The invention transitions from three-dimensional bulk doping to two-dimensional sheet doping or delta-doping approaches. By confining dopants to specific planes or interfaces rather than distributing them throughout the bulk active layer, the patent maintains high electron mobility in the channel while providing sufficient carriers for device operation through interface states or thin doped layers
4Speed
If low doping concentration is used in the active layer, then electron mobility is maintained, but driving current capability is insufficient
Solution Approach 1:
The invention introduces dynamic carrier generation through gate-controlled band-to-band tunneling or impact ionization. The ultralow-doped active layer maintains high electron mobility, while the gate electrode dynamically generates carriers at the source-channel interface during operation, providing sufficient driving current without requiring high static doping concentrations that would reduce mobility
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively blocks leakage current and enhances DC and high-frequency properties while operating at lower power levels, using a bulk silicon substrate and semiconductor materials with higher electron mobility than silicon.
Implementation Method 1
forming a blocking semiconductor layer between silicon substrate and active layer by a semiconductor material having a specific difference of energy bandgap from that of the active layer to substitute a buried oxide for blocking a leakage current
Data Source
AI summary
The present invention provides a silicon-compatible compound junctionless field effect transistor enabled to be compatible to a bulk silicon substrate for substituting an expensive SOI substrate, to form a blocking semiconductor layer between a silicon substrate and an active layer by a semiconductor material having a specific difference of energy bandgap from that of the active layer to substitute a prior buried oxide for blocking a leakage current at an off-operation time and to form the active layer by a semiconductor layer having electron or hole mobility higher than that of silicon, and to operate perfectly as a junctionless device though the dopant concentration of the active layer is much lower than the prior junctionless device.