High-Voltage Junctionless GaN Device With Drift Region
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Solution Overview
Problem
Current semiconductor technologies face challenges in achieving high voltage and high mobility in junctionless devices, particularly with gallium nitride (GaN) materials, which are essential for advanced high-frequency and high-power applications.
Innovation Solution
A method for forming a high voltage junctionless device with a drift region involves creating a substrate with a fin structure, depositing a semiconductor channel layer, forming a drift region on both sides, and using a dielectric and metal gate layer, followed by selective etching and doping to create source and drain regions, enabling higher punch-through voltages and mobility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional reverse-channel MOS transistor is used, then device structure is simple, but carrier mobility is low and response speed is slow
Solution Approach 1:
The device is segmented into distinct functional regions: source region, channel region, drain region, and drift region. The channel is divided into a first channel portion and a second channel portion with different impurity concentrations, allowing optimized performance in each segment while maintaining overall device functionality.
Solution Approach 2:
Different regions of the device are assigned different impurity concentrations to optimize local performance. The first channel portion has a first impurity concentration while the second channel portion has a second impurity concentration, creating local quality variations that enhance carrier mobility and device reliability without requiring complete structural redesign.
2Reliability
If junctionless transistor without drift region is used, then manufacturing is simpler, but punch-through voltage is insufficient for high voltage applications
Solution Approach 1:
The drift region is formed preliminarily during the manufacturing process by depositing a drift layer and selectively removing portions of it. This preliminary formation of the drift region with controlled impurity concentration establishes the necessary punch-through voltage characteristics before final device assembly, ensuring high voltage capability is built-in from the start.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed method enhances the performance and reliability of high voltage junctionless devices by achieving higher punch-through voltages and mobility, making them suitable for high-frequency and high-power applications.
Implementation Method 1
a semiconductor channel layer is sequentially deposited on the said buffer layer and the said fin structure surface
Implementation Method 2
Sequentially etching off the dielectric layer at the fin structure and the exposed dielectric layer and drift region above the buffer layer surface
Implementation Method 3
Doping the exposed source and drain regions to form source and drain
Data Source
AI summary
The present invention discloses a method of forming a high voltage junctionless device with drift region. The drift region formed between the semiconductor channel and the dielectric layer enables the high voltage junctionless device to exhibit higher punch-through voltages and high mobility with better performance and reliability.