Junctionless Transistor Graded Dopant Short-Channel Control
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Solution Overview
Problem
Conventional junctionless transistors suffer from poor short-channel control, which affects their performance and functionality, particularly when scaled down to smaller sizes.
Innovation Solution
A junctionless transistor design is implemented with a graded dopant region in the semiconductor layer, where the doping concentration gradually decreases from the top surface to the bottom surface, improving short-channel control by creating a more defined active area and source/drain regions with uniform conductivity type.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional junctionless transistors are used, then manufacturing simplicity is maintained, but short-channel control deteriorates
Solution Approach 1:
The patent applies local quality by introducing a graded dopant region with varying doping concentrations at different locations within the semiconductor layer. The dopant concentration is higher near the top surface and lower near the bottom surface, creating spatially varying electrical properties that improve short-channel control while maintaining the overall junctionless transistor structure and manufacturing process simplicity.
2Productivity
If transistor size is scaled down, then device density and productivity are improved, but short-channel control deteriorates
Solution Approach 1:
The patent employs parameter changes by modifying the dopant concentration parameter throughout the semiconductor layer. The graded dopant profile creates a gradual transition in doping concentration from the top surface to the bottom surface, which alters the electrical characteristics and improves short-channel control in scaled-down transistors, enabling higher device density without sacrificing reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The graded dopant region enhances short-channel control, achieving a significant difference between on and off states, thereby improving the transistor's performance and functionality, especially at smaller scales.
Implementation Method 1
The active area comprises a graded dopant region that has a higher doping concentration near a top surface of the semiconductor layer and a lower doping concentration near a bottom surface of the semiconductor layer. This graded dopant region has a gradual decrease in the doping concentration.
Data Source
AI summary
A transistor includes a semiconductor layer, and a gate dielectric is formed on the semiconductor layer. A gate conductor is formed on the gate dielectric and an active area is located in the semiconductor layer underneath the gate dielectric. The active area includes a graded dopant region that has a higher doping concentration near a top surface of the semiconductor layer and a lower doping concentration near a bottom surface of the semiconductor layer. This graded dopant region has a gradual decrease in the doping concentration. The transistor also includes source and drain regions that are adjacent to the active region. The source and drain regions and the active area have the same conductivity type.