Junction-less Transistor Structure for Power Semiconductor Reliability
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Solution Overview
Problem
Conventional vertical junction FETs face challenges in meeting the requirements of power semiconductor devices due to abrupt doping changes, leading to threshold voltage drift and increased leakage current, which are exacerbated by the continuous reduction in semiconductor device dimensions.
Innovation Solution
The development of a junction-less transistor structure with identical doping types in the source, drain, and channel regions, eliminating PN junctions and employing an epitaxial layer with trenches, a gate dielectric layer, and electrode layers to control the transistor's on and off states without abrupt doping changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional vertical junction FETs are used with abrupt doping changes, then the device structure is simple and manufacturing is easier, but threshold voltage drift and leakage current increase significantly
Solution Approach 1:
The patent extracts and removes the abrupt doping junctions from the device structure, transitioning to a junction-less FET where the channel, source, and drain regions have identical doping types. This eliminates the PN junctions that cause threshold voltage drift and leakage current, while maintaining a relatively simple overall device architecture.
Solution Approach 2:
The patent changes the doping parameter from abrupt transitions to uniform doping throughout the channel region. By making the doping concentration consistent across the channel, source, and drain regions, the device eliminates the harmful effects of doping abruptness while maintaining structural simplicity.
2Length of moving object
If the critical dimension of semiconductor devices is reduced to meet technical node requirements, then device scaling is achieved, but threshold voltage drift and leakage current are exacerbated
Solution Approach 1:
The patent removes the abrupt doping junctions that become problematic at scaled dimensions. By eliminating the PN junctions entirely and using uniform doping, the device avoids the threshold voltage drift and leakage current issues that are exacerbated by reduced critical dimensions in conventional FETs.
3Reliability
If junction-less transistor structure is implemented with identical doping types, then threshold voltage drift and leakage current are inhibited, but the device structure and fabrication process become more complex
Solution Approach 1:
The patent segments the channel region into multiple sections (first channel region, second channel region, third channel region) with different doping concentrations, all of the same doping type. This segmentation allows for optimized carrier control and performance while maintaining the junction-less architecture that prevents leakage current and threshold voltage drift.
Solution Approach 2:
The patent applies local quality by creating regions with different doping concentrations within the channel, where each region is optimized for specific functions. The first, second, and third channel regions have progressively different doping levels, allowing localized optimization while maintaining overall uniform doping type throughout the device.
Data Source
AI summary
A junction-less transistor structure and fabrication method thereof are provided. The method includes providing a semiconductor substrate; and forming an epitaxial layer having a first surface and a second surface on the semiconductor substrate. The method also includes forming a plurality of trenches in the epitaxial layer from the first surface thereof; and forming a gate dielectric layer on side and bottom surfaces of the plurality of trenches. Further, the method includes forming a gate electrode layer on the gate dielectric layer and in the plurality of trenches; and forming an insulation layer on the gate electrode layer. Further, the method also includes forming a drain electrode layer on the first surface of the epitaxial layer; removing the semiconductor substrate; and forming a source electrode layer on the second surface of the epitaxial layer.