Disjunctive K/N Gate Splitting for Fault Tree Analysis

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Solution Overview

Problem

The expansion of k/n gates in fault tree analysis leads to high space complexity and poor readability due to the generation of an enormous number of minimal cut sets, especially when inputs are OR gates, causing memory overflow errors and complexity in evaluating disjunctive k/n gates.

Innovation Solution

A method to split disjunctive k/n gates with OR gate inputs into disjoint conjunctive k/m gates without further OR gate inputs, reducing the need for expansion and improving readability by applying a k/n gate splitting process that transforms the gates into minimal voting gates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If k/n gate expansion method is used to evaluate minimal cut sets, then the evaluation can be performed using standard algorithms, but the space complexity becomes enormous and causes memory overflow errors

Engineering Contradiction:
Improvefault tree analysis capabilityVSAvoidspace complexity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent segments the disjunctive k/n gate into multiple conjunctive k/m gates by introducing auxiliary variables. This segmentation transforms one complex gate requiring exponential space into multiple simpler gates that can be evaluated with polynomial space complexity, directly resolving the memory overflow problem while maintaining evaluation capability.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If k/n gate is expanded into k-combinations of input events, then minimal cut sets can be generated, but the number of resulting combinations becomes factorial when n is large and k is close to n/2

Engineering Contradiction:
Improveminimal cut set evaluation accuracyVSAvoidcomputational complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces auxiliary variables as intermediaries between the original input events and the k/n gate output. These auxiliary variables act as mediators that decompose the factorial complexity into manageable polynomial complexity steps, allowing accurate minimal cut set evaluation without generating an enormous number of combinations.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If disjunctive k/n gate with OR gate inputs is expanded, then complete minimal cut sets are generated, but readability of resulting MCSs becomes poor due to enormous number of combinations

Engineering Contradiction:
Improvecompleteness of minimal cut set evaluationVSAvoidreadability of minimal cut sets
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent segments the disjunctive k/n gate evaluation into multiple conjunctive sub-gates, which produces a more structured and organized set of minimal cut sets. This segmentation maintains the completeness of the evaluation while improving readability by avoiding the generation of an enormous, unmanageable number of combinations.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8909991B2Fault tree system reliability analysis system, fault tree system reliability analysis method, and program therefor
Publication Date: 2014.12.09 NEC CORP
  • US8909991B2 patent drawing
  • US8909991B2 patent drawing
  • US8909991B2 patent drawing

AI summary

The present invention is a fault tree system reliability analysis system, comprising: k/n gate splitting means for splitting a disjunctive k/n gate with inputs of OR gates into disjoint conjunctive k/m gates (m≦n) without input of OR gate.