Kahn Network Buffer Memory Token Management

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Solution Overview

Problem

Current electronic systems with onboard multiprocessor architectures face inefficiencies due to loosely coupled programmable processors and hardware accelerators, leading to high complexity in programming and resource management, as well as difficulties in partitioning the system into hardware and software components.

Innovation Solution

A tightly coupled hardware/software architecture is implemented using a shared memory and common communications and synchronization protocol based on the Kahn Process Network (KPN) model, allowing efficient communication and synchronization between processors and hardware accelerators through shared synchronization counters and token management functions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a loosely coupled high-speed communications system is used between processors and hardware accelerators, then communication speed is improved, but system complexity and programming difficulty increase

Engineering Contradiction:
Improvecommunication speedVSAvoidsystem complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

A Kahn Process Network (KPN) based communication layer is introduced as an intermediary between processors and hardware accelerators. This layer provides standardized communication protocols and buffer management, eliminating the need for complex point-to-point communication configurations while maintaining high-speed data transfer. The KPN model acts as a mediator that simplifies the interaction between different system components.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The communication system is segmented into independent actors (processors, hardware accelerators, buffer memories) that communicate through standardized KPN channels. This segmentation allows each component to operate independently with well-defined interfaces, reducing overall system complexity while enabling high-speed parallel communication between segments.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If conventional programming tools are used for multiprocessor systems, then programming flexibility is maintained, but programming complexity increases significantly

Engineering Contradiction:
Improveprogramming flexibilityVSAvoidprogramming complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The KPN communication layer provides universal interfaces and standardized protocols that can be used across different processor and hardware accelerator configurations. This universality allows programmers to use the same KPN-based programming model regardless of the specific hardware architecture, reducing programming complexity while maintaining flexibility through the standardized multi-functional interface.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Speed

If buffer memories are managed without token-based synchronization, then memory access speed is improved, but synchronization accuracy deteriorates

Engineering Contradiction:
Improvememory access speedVSAvoidsynchronization accuracy
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

Tokens are embedded within the buffer memory structure itself, allowing buffer memories to automatically manage their own synchronization state. When data is produced or consumed, tokens are automatically updated without requiring external intervention, maintaining both high access speed and precise synchronization. The buffer memory serves itself by incorporating synchronization information directly in its data structure.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The token-based system implements feedback mechanisms where buffer memories continuously report their synchronization state through token counts to connected actors. This feedback allows producers and consumers to adjust their operations in real-time, ensuring accurate synchronization while maintaining efficient data flow without blocking.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10346322B2Onboard Kahn network type system comprising a plurality of source and destination actors in order to manage buffer memories based on tokens
Publication Date: 2019.07.09 STMICROELECTRONICS (GRENOBLE 2) SAS
  • US10346322B2 patent drawing
  • US10346322B2 patent drawing

AI summary

An electronic system implements a software application described in the form of a graph of the Kahn network type, and includes actors. At least one of the actors includes a processor, and at least another one of the actors includes a hardware accelerator. Buffer memories are coupled between the actors. A central processor is configured to enable communications between the actors according to a communications and synchronization protocol. The processor and the hardware accelerator are configured to use different individual communications protocols.