Power Module Package Structure With Wire-Bond-Free Kelvin Connections
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Solution Overview
Problem
Existing power module designs for wide bandgap semiconductor devices face manufacturing complexity and performance limitations due to multiple interconnection technologies, leading to increased thermal and electrical package resistance, parasitic inductance, and reduced switching performance.
Innovation Solution
A power module package design featuring a substrate with insulated traces and semiconductor dies attached using metallic particle sintering, eliminating wire bonds and incorporating a Kelvin probe for improved mechanical and vibrational robustness, with a source down die-attach and drain clip-attach configuration for reduced ohmic resistance and enhanced thermal impedance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wire bonds and multiple interconnection technologies are used to connect semiconductor dies, then electrical connections can be established, but manufacturing complexity increases and parasitic inductance increases
Solution Approach 1:
The patent merges multiple interconnection functions into a single integrated substrate structure. The substrate includes integrated traces, contact pads, and connection structures that simultaneously provide electrical connection, mechanical support, and thermal management functions, eliminating the need for separate wire bonds and multiple interconnection technologies.
Solution Approach 2:
The substrate serves multiple functions: it provides electrical connections through integrated traces and pads, mechanical support for the semiconductor dies, thermal conduction pathways, and structural integration for the entire module. This multi-functional design reduces manufacturing complexity while maintaining connection reliability.
2Reliability
If long wire bond connections are used to connect gate pads to contacts, then electrical connections can be established, but parasitic inductance increases and switching performance deteriorates
Solution Approach 1:
The patent extracts and eliminates the wire bond interconnection method entirely. Instead of using separate wire bonds to connect gate pads to contacts, the design uses direct integrated traces on the substrate that provide short, low-inductance connections between all electrical terminals.
Solution Approach 2:
Instead of connecting components through external wire bonds from the die surface, the patent inverts the approach by integrating all connection pathways directly onto the substrate before die attachment. This allows traces to extend directly under and around the semiconductor dies, creating the shortest possible current paths.
3Reliability
If multiple interconnection technologies are used, then electrical connections can be established, but thermal resistance increases and heat generation increases
Solution Approach 1:
The patent combines electrical connection and thermal conduction functions into integrated pathways on the substrate. The same metal traces and contact structures that provide electrical connectivity also serve as thermal conduction paths, eliminating the need for separate thermal management components and reducing overall thermal resistance.
Solution Approach 2:
The substrate employs composite material structures with high thermal conductivity materials (such as copper or aluminum traces on ceramic or metal-core substrates) that simultaneously provide electrical connectivity and efficient heat dissipation pathways, reducing thermal resistance throughout the module.
4Reliability
If clip bonding is used for source pad connections, then electrical connections can be established, but contact area is reduced and ohmic resistance increases
Solution Approach 1:
The patent merges the source pad connection with the substrate's integrated trace structure. Instead of using separate clip bonds that make point contacts, the design uses broad, integrated metal traces on the substrate that provide large-area, low-resistance connections to the source pads of multiple semiconductor dies simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces manufacturing complexity, improves switching performance, and extends product lifetime by minimizing heat generation and parasitic inductance, while enabling the use of smaller SiC dies with lower input capacitance and gate charge for equivalent performance.
Implementation Method 1
attaching the first electrode pad to the first trace and attaching the control electrode pad to the second trace
Implementation Method 2
a first trace and a second trace insulated from each other on the substrate, the first trace having a first end directly connected to the first electrode pad and having a second end directly connected to a first electrode contact
Data Source
AI summary
A power module package and method of manufacture is provided, and includes: a substrate, a first and a second trace insulated from each other on the substrate, and at least one semiconductor die. Each die includes a first and a second electrode pad and a control electrode pad. The first pad and the control pad are on a first surface of the die facing the substrate, and the second pad is on a second surface of the die facing away from the substrate. The first pad is connected to the first trace, and the control pad is connected to the second trace. The package further includes a first electrode contact connected to the first trace, a second electrode contact connected to the second electrode pad of each die from a side of each die away from the substrate, and a control electrode contact connected to the second trace.