Kernel Code Segmentation for NUMA Access Delay Reduction
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Solution Overview
Problem
In Non Uniform Memory Access (NUMA) architectures, remote-end access delay becomes a significant bottleneck, especially with multiple nodes, as processes frequently need to synchronize kernel page tables when migrating, leading to performance issues.
Innovation Solution
Implementing a data access processing method that uses segmentation technology to create multiple copies of the kernel code on each node, mapping virtual addresses to different linear addresses through a Global Descriptor Table (GDT), and recording these mappings in a kernel page table, allowing processes to access kernel code locally without synchronizing page tables.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If a copy of kernel code is saved in each node using paging technology, then remote-end access delay is reduced, but system performance deteriorates due to frequent page table modifications during process migration
Solution Approach 1:
The patent applies segmentation by dividing the kernel code into multiple segments and creating separate segment descriptors in the Global Descriptor Table (GDT) for each node. Each segment descriptor contains a base address specific to that node, allowing the kernel code to be accessed from different physical locations without requiring page table synchronization during process migration.
2Ease of operation
If kernel page tables are synchronized on each node, then local access to kernel code is enabled, but device complexity increases due to frequent page table modifications
Solution Approach 1:
The patent extracts the base address information from the page table structure and places it directly in the Global Descriptor Table (GDT) segment descriptors. This extraction eliminates the need for complex page table synchronization mechanisms during process migration, as the GDT contains all necessary base address information for each node independently.
3Adaptability or versatility
If the number of nodes in NUMA architecture is increased, then scalability is improved, but remote-end access delay increases
Solution Approach 1:
The patent implements local quality by configuring each node with its own specific base addresses in the GDT segment descriptors. This allows each node to access the kernel code from locally optimized physical addresses, ensuring that even as the number of nodes increases, each node maintains fast local access to kernel code without being affected by remote access delays from other nodes.
Data Source
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AI summary
A data access processing method and apparatus, the method comprising: copying a kernel code and a global descriptor table on a memory of each of nodes respectively (101); making base addresses of kernel code segments on the respective nodes in the global descriptor table respectively point to linear addresses of the kernel code corresponding to the respective nodes based on a virtual address of the kernel code (102); and recording a mapping relation between the linear addresses of the kernel code corresponding to the respective nodes and physical addresses of the respective nodes in a kernel page table respectively, to enable a process to access the kernel code locally in the respective nodes (103). The apparatus comprises a copying module (401), a modifying module (402) and a recording module (403). The method and apparatus can avoid frequently modifying the contents of the page table when the process migrates among the nodes, thereby improving system performance.