Kernel Integrity Enforcement via Ring -1 Hardware Assists

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Solution Overview

Problem

Modern operating systems face vulnerabilities due to their large code bases and modularization features, allowing attackers to compromise kernel integrity, which is critical for maintaining the security and trustworthiness of computer platforms.

Innovation Solution

The implementation of Intel Virtual Machine Extensions (VMX) and an extension monitor engine (xMon) that operates at a higher privilege level than the operating system, using hardware assists to enforce kernel integrity without modifying the kernel, by de-privileging the OS and controlling access to CPU and platform resources, ensuring non-extensibility and immutability of kernel code and mappings.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the operating system kernel is made larger and more modular to provide more services, then the functionality and adaptability of the OS is improved, but the vulnerability to attacks and the difficulty of maintaining kernel integrity worsens

Engineering Contradiction:
ImproveOS functionalityVSAvoidkernel integrity
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent segments the system into two distinct privilege levels: a high-privilege mode (ring -1) for security enforcement and a standard kernel mode (ring 0) for OS operation. This segmentation allows the OS to maintain its large, modular code base while isolating the integrity enforcement mechanism at a separate privilege level, thus resolving the contradiction between OS functionality and kernel integrity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary security enforcement mechanism that operates at ring -1 privilege level. This intermediary monitors and controls access to kernel resources without requiring modifications to the OS kernel itself, allowing the OS to maintain its full functionality while the intermediary ensures kernel integrity through hardware-assisted enforcement.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If hardware assists are implemented to enforce kernel integrity, then the security and reliability of the system is improved, but the device complexity and performance overhead worsen

Engineering Contradiction:
Improvekernel integrityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements self-service mechanisms where the hardware automatically enforces security policies through privilege level transitions and access controls. The security enforcement is embedded in the hardware itself rather than requiring complex software-based solutions, reducing overall system complexity while maintaining strong kernel integrity protections.

Inventive Principle:
Principle #25Self-service

3Ease of operation

If the OS operates at higher privilege level to maintain traditional access control, then the ease of operation is improved, but the security vulnerability to malicious code worsens

Engineering Contradiction:
ImproveOS operationVSAvoidsecurity vulnerability
Core Design Contradiction:
Ease of operationVSObject-affected harmful factors

Solution Approach 1:

The patent inverts the traditional privilege model by placing the security enforcement mechanism at a higher privilege level (ring -1) than the OS kernel (ring 0). This inversion allows the OS to operate with traditional ease while the higher-privilege security mechanism monitors and controls access to prevent malicious code execution, thus resolving the contradiction between ease of operation and security vulnerability.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS10956571B2Kernel runtime integrity using processor assists
Publication Date: 2021.03.23 INTEL CORP
  • US10956571B2 patent drawing
  • US10956571B2 patent drawing
  • US10956571B2 patent drawing

AI summary

Systems, apparatuses and methods may provide for locating operating system (OS) kernel information and user mode code in physical memory, wherein the kernel information includes kernel code and kernel read only data, and specifying permissions for the kernel information and the user code in an extended page table (EPT). Additionally, systems, apparatuses and methods may provide for switching, in accordance with the permissions, between view instances of the EPT in response to one or more hardware virtualization exceptions.