Kernel Memory Locking for Over-Committed Systems

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing systems with pageable kernel memory face performance inhibition, inflated need for paging space, and time latency in resolving kernel page faults, particularly affecting real-time processes.

Innovation Solution

The implementation of techniques that allocate logical memory in computing systems, where a hypervisor prioritizes physical memory allocation based on klock and non-klock page fields, ensuring that non-klock pages are swapped before klock pages, thereby optimizing memory usage and reducing latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If kernel memory is configured as pageable to enable operation in small memory systems, then memory utilization is improved, but system performance deteriorates due to time latency in resolving kernel page faults

Engineering Contradiction:
Improvememory utilizationVSAvoidtime latency in resolving kernel page faults
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent segments kernel memory into two distinct categories: klock pages (kernel locked pages) that cannot be paged out, and non-klock pages that can be paged out. This segmentation is implemented through separate data structures (first data structure for klock pages, second data structure for non-klock pages) that track different page types independently. By dividing kernel memory management into these two segments, the system achieves both high memory utilization (through paging of non-klock pages) and low latency (by ensuring klock pages remain in physical memory), thus resolving the technical contradiction.

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If over-commitment of memory is implemented to allow multiple LPARs to share physical memory, then memory efficiency is improved, but system reliability deteriorates due to increased risk of server crashes from memory faults

Engineering Contradiction:
Improvememory efficiencyVSAvoidsystem reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent applies local quality by assigning different protection characteristics to different portions of kernel memory. Specifically, klock pages are designated with a special quality attribute (locked status) that prevents them from being paged out to secondary storage, while non-klock pages have standard paging characteristics. This localized differentiation ensures that critical kernel components (stored in klock pages) remain reliably in physical memory even when the system is over-committed, thereby maintaining system reliability while still allowing memory over-commitment for improved efficiency.

Inventive Principle:
Principle #3Local quality

3Reliability

If all kernel pages are locked in memory to prevent paging, then system reliability is improved, but memory efficiency deteriorates due to reduced available memory for paging operations

Engineering Contradiction:
Improvesystem reliabilityVSAvoidmemory efficiency
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent implements partial locking by locking only the necessary portion of kernel memory (klock pages) rather than all kernel pages. The first data structure tracks klock pages that require locking for reliability, while the second data structure tracks non-klock pages that can be paged out to improve memory efficiency. This partial action approach achieves the minimum necessary locking to ensure system reliability while maximizing memory efficiency by allowing non-critical kernel pages to participate in paging operations.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS8972647B2Kernel memory locking for systems that allow over-commitment memory
Publication Date: 2015.03.03 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US8972647B2 patent drawing
  • US8972647B2 patent drawing
  • US8972647B2 patent drawing

AI summary

Provided are techniques for allocating logical memory corresponding to a logical partition in a computing system; generating a S/W PFT data structure corresponding to a first page of the logical memory, wherein the S/W PFT data structure comprises a field indicating that the corresponding first page of logical memory is a klock page; transmitting a request for a page of physical memory and the corresponding S/W PFT data structure to a hypervisor; allocating physical memory corresponding to the request; and, in response to a pageout request, paging out available logical memory corresponding to the logical partition that does not indicate that the corresponding page is a klock page prior to paging out the first page.