Kernel Text Memory Error Handling via Branch Relocation
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Solution Overview
Problem
Current methods for handling corrected memory errors on kernel text in computer systems are inadequate, as they often require system rebooting, leading to downtime and reduced availability due to the inability to migrate kernel text to a different physical memory location, which increases the risk of uncorrectable errors.
Innovation Solution
A method that identifies a correctable error in kernel text, loads the impacted kernel function's instructions into a new memory region, and updates the first instruction to branch to the new location, thereby reducing the risk of uncorrectable errors without requiring a system reboot.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If kernel text is kept in its original physical memory location, then memory access efficiency is maintained, but the system becomes vulnerable to uncorrectable errors when correctable errors occur
Solution Approach 1:
The patent segments the kernel text by creating a copy of the affected kernel function instructions in a new memory region, separating the erroneous instructions from the rest of the kernel text. This allows the system to isolate and handle memory errors without affecting the entire kernel or requiring system-wide changes.
Solution Approach 2:
The patent introduces a branch instruction as an intermediary mechanism that redirects execution flow from the original memory location to the new memory location. This intermediary approach allows the system to maintain original memory mappings while redirecting execution away from erroneous instructions, avoiding the need for complex memory remapping.
2Reliability
If the system reboots to handle correctable memory errors, then system reliability is restored, but system availability and productivity decrease due to downtime
Solution Approach 1:
The patent performs preliminary actions by loading a copy of the kernel function instructions into a new memory region before the correctable error becomes uncorrectable. This proactive approach prepares the system to handle errors without interruption, maintaining productivity while ensuring reliability.
Solution Approach 2:
The patent dynamically updates the first instruction at the original memory location to include a branch to the new memory location. This dynamic modification allows the system to adapt to memory errors in real-time without requiring a reboot, maintaining both reliability and productivity.
3Reliability
If kernel text is migrated to a new physical memory location, then the risk of uncorrectable errors is reduced, but the complexity of memory management and instruction loading increases
Solution Approach 1:
The patent applies local quality by migrating only the affected kernel function instructions rather than the entire kernel text. This localized approach reduces the complexity of memory management while still providing protection against uncorrectable errors in the specific affected region.
Solution Approach 2:
The patent uses copying to create a duplicate of the kernel function instructions in a new memory region. This copying approach simplifies the migration process compared to complex remapping schemes, as it involves straightforward memory allocation and data duplication followed by a simple branch instruction update.
4Productivity
If the first instruction is updated to branch to the new memory location, then execution continues without interruption, but the risk of introducing new errors during instruction modification increases
Solution Approach 1:
The patent uses self-service by having the system update its own instruction stream to include the branch instruction. This self-modification capability allows the system to maintain continuous operation while managing error risks through controlled, systematic instruction updates rather than external intervention.
Data Source
AI summary
Embodiments of the present disclosure facilitate handling corrected memory errors on kernel text. An example computer-implemented method includes identifying a correctable error (CE) in an error memory location of a memory and a kernel function impacted by the CE. The kernel function includes a plurality of instructions including a first instruction of the kernel function at a first physical location in a first region of the memory. The first region includes the error memory location. The plurality of instruction is loaded to a second region of the memory. The loading includes storing the first instruction of the kernel function at a second physical location in the second region of the memory. The first physical location in the first region of the memory is updated to include an instruction to branch to the second physical location in the second region of the memory.