Kernel Virtual Address Translation for Secure Page Fault Monitoring
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Solution Overview
Problem
In computer systems with memory virtualization, exposing page fault information to user space memory monitor threads can compromise security enhancements by revealing virtual address information, potentially defeating address randomization techniques.
Innovation Solution
The kernel converts file offsets into second virtual memory addresses for the memory monitor thread, allowing it to handle page faults without knowing the virtual address space of the faulting thread, thus maintaining security by keeping the virtual address information hidden.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the kernel exposes page fault information (including virtual addresses) to user space memory monitor threads, then the memory monitor thread can effectively monitor and handle page faults, but security enhancements are compromised as virtual address information is revealed
Solution Approach 1:
The patent introduces a second virtual memory address space as an intermediary layer between the faulting user process and the memory monitor thread. The kernel translates the first virtual address (from the faulting process) into a second virtual address (in the monitor thread's address space), allowing the monitor thread to handle the page fault without accessing the original virtual address space. This intermediary translation mechanism enables effective page fault monitoring while preserving security by keeping the faulting process's virtual address information hidden from the monitor thread.
2Ease of operation
If the memory monitor thread knows the virtual address space of the faulting thread, then it can accurately track and manage memory operations, but address randomization techniques are defeated
Solution Approach 1:
The patent segments the virtual address space into two distinct independent address spaces: the first virtual memory address space belonging to the faulting user process, and the second virtual memory address space belonging to the memory monitor thread. The kernel maintains separate page tables for each address space, allowing the monitor thread to operate in its own isolated address space while still being able to monitor memory operations. This segmentation prevents the monitor thread from accessing or knowing the virtual address layout of the faulting process, thereby preserving address randomization effectiveness.
3Reliability
If the kernel translates virtual addresses to file offsets and back to virtual addresses for the memory monitor thread, then security is maintained by hiding virtual address information, but the complexity of address translation increases
Solution Approach 1:
The patent implements a universal address translation mechanism that serves multiple functions simultaneously: (1) it translates virtual addresses to file offsets for proper data location identification, (2) it translates file offsets back to virtual addresses in the monitor thread's address space for handling page faults, and (3) it maintains security by ensuring the monitor thread only sees addresses in its own address space. The kernel's page table structure is extended to support multiple address spaces, allowing this multi-functional translation to be handled through existing virtual memory infrastructure rather than requiring entirely new complex mechanisms.
Data Source
AI summary
A system and method relates to detecting a hardware event, determining a first virtual memory address associated with the hardware event, wherein the first virtual memory address is associated with a first processing thread, identifying, using the first virtual memory address, an entry of a logical address table, the entry comprising a file descriptor and a file offset associated with a file, identifying a memory address table associated with the file descriptor, translating, using the memory address table, the file offset into a second virtual memory address associated with a second processing thread, and transmitting, to the second processing thread, a notification comprising the second virtual memory address.