Keyhole Opening in Phase Change Memory Cell Manufacturing

The patent utilizes the phase transition of silicon from crystalline to amorphous state through oxidation processing. The silicon layer transforms into amorphous silicon oxide, which has different volume characteristics, enabling the formation of self-converged voids with sub-lithographic dimensions. This phase transition mechanism allows precise control of void size and shape that cannot be achieved through conventional lithographic processes alone, thereby reducing memory cell size while maintaining manufacturing reliability.

The patent changes the physical and chemical parameters of the silicon layer by controlling oxidation conditions (temperature, time, atmosphere). By adjusting these parameters, the silicon layer undergoes controlled transformation into amorphous silicon oxide with specific volume expansion characteristics. This parameter control enables precise tuning of the void size and shape, achieving sub-lithographic dimensions with high uniformity across wafers, thus resolving the contradiction between miniaturization and manufacturing precision.

The patent employs a self-service mechanism where the silicon layer automatically forms the desired void structure through controlled oxidation. The oxidation process causes volume expansion of the silicon layer, which naturally creates self-converged voids with precise dimensions without requiring additional lithographic steps or complex patterning. This self-organizing behavior simplifies the manufacturing process while achieving the small phase change material element size needed for low reset current operation.

The patent performs preliminary formation of the silicon layer and its transformation to amorphous silicon oxide before depositing the phase change material. This preliminary action creates the self-converged void structure in advance, which then guides the phase change material deposition to form the small-sized active region. By preparing the structural framework beforehand, the process avoids complex post-deposition patterning steps, reducing manufacturing complexity while ensuring precise control over the phase change material element size for minimized reset current.

The patent utilizes the phase transition of silicon to amorphous silicon oxide to create self-converged voids with precisely controlled dimensions. The void geometry, formed by the volumetric expansion during oxidation, naturally defines the contact area between electrodes and phase change material. This phase transition-based formation mechanism achieves superior dimensional control and uniformity compared to conventional lithographic patterning, thereby meeting the high manufacturing precision requirements for small contact areas while enabling high current density operation.

The patent controls the oxidation parameters (temperature, time, oxygen partial pressure) to precisely regulate the volume expansion of silicon and the resulting void dimensions. By optimizing these parameters, the process achieves highly uniform void sizes and shapes across large wafer areas, which directly translates to uniform contact areas between electrodes and phase change material. This parameter control enables the fabrication of small contact areas with the precision required for high current density while maintaining manufacturability.