Keystream Encryption via Clock-Controlled Pseudo Random Number Generation
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Solution Overview
Problem
Stream encryption methods face inefficiencies and security issues when performing encryption in units of words, particularly due to the lack of effective clock control and independent key schedules, leading to potential leakage of secret keys and synchronization deviations between senders and receivers.
Innovation Solution
A keystream encryption device and method that utilize a clock controller to generate pseudo random number sequences through linear feedback shift registers, applying nonlinear functions and XOR operations to ensure efficient and secure encryption in units of words, with self-synchronization mechanisms to recover from synchronization deviations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If stream encryption is performed in units of words without clock control, then processing speed is improved, but security is compromised due to potential leakage of secret keys and synchronization deviations
Solution Approach 1:
The patent segments the encryption process into two independent parts: a word-level encryption using a keystream generator for speed, and a bit-level verification using clock control for security. The keystream generator processes words in parallel for high speed, while the clock controller individually manages each bit's encryption and authentication, resolving the contradiction between speed and security.
Solution Approach 2:
The patent introduces a clock controller as an intermediary component that bridges the word-level keystream generation and bit-level security requirements. The clock controller receives the keystream generated at word level and distributes it to individual bit positions, adding clock-controlled authentication without sacrificing the word-level processing speed.
2Reliability
If clock control is used in stream encryption, then security is improved through independent key schedules, but processing efficiency is reduced due to word-length encryption being canceled
Solution Approach 1:
The patent segments the encryption function into two independent generators: a keystream generator that operates at word level for efficiency, and a clock controller that operates at bit level for security. This segmentation allows each component to optimize for its specific function without compromising the other.
Solution Approach 2:
The patent transitions from a single-dimensional bit-by-bit encryption approach to a two-dimensional approach where word-level keystream generation and bit-level clock control operate simultaneously. This dimensional change allows the system to achieve both high processing efficiency at the word level and strong security at the bit level.
3Device complexity
If no independent key schedule algorithm is used, then device complexity is reduced, but security is compromised due to leakage of internal state revealing partial secret keys
Solution Approach 1:
The patent introduces a clock controller as an intermediary that implements independent key scheduling without significantly increasing overall device complexity. The clock controller manages separate key materials and scheduling for each bit position, providing security against internal state leakage while maintaining relatively simple device architecture.
Solution Approach 2:
The patent segments the key scheduling function into independent bit-level controllers that each manage their own key materials. This segmentation provides independent key schedules for each bit position, preventing leakage of one bit's key from revealing other bits' keys, while keeping each individual key schedule simple.
4Ease of operation
If synchronization between sender and receiver is not secured, then ease of operation is improved, but reliability is reduced due to deviation in synchronization causing encryption/decryption failure
Solution Approach 1:
The patent implements feedback mechanisms at the bit level through the clock controller that tracks and adjusts synchronization between sender and receiver. The clock controller receives feedback about timing deviations and automatically adjusts the encryption/decryption process to maintain synchronization, ensuring reliable operation without complex manual coordination.
Data Source
AI summary
A stream encryption device generates a first pseudo random number sequence from key information, generates a second pseudo random number sequence according to clock control performed according to the first pseudo random number sequence, and subjects it to a nonlinear function calculation, thereby generating a key stream. The stream encryption device performs XOR operation with a plain text so as to create an encrypted text. The stream encryption device performs an encryption process in units of words by using a clock controller. It includes: a first pseudo random number generation means to generate a first pseudo random number sequence from key information; a second pseudo random number generation means to generate a second pseudo random number sequence based on clock control performed according to the first pseudo random number sequence; and, a keystream generation means to generate a keystream by applying a nonlinear function calculation to the second pseudo random number sequence.