Kick Voltage Control for NAND Flash Read Setup Time
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Solution Overview
Problem
In semiconductor storage devices like NAND-type flash memory, there is a need to rapidly transition the read voltage to the desired level for multi-valued memory cell transistors, which is challenging due to variations in threshold voltages and coding schemes, leading to increased setup time and inefficiencies in data reading.
Innovation Solution
The implementation of a kick voltage mechanism, where a selected word line is set to a desired voltage quickly by applying a kick voltage, and adjacent word lines receive a kick voltage opposite in polarity to facilitate faster transition, reducing setup time by controlling the adjacent word line kick voltage based on the amount of read voltage transition.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If a kick voltage is applied to the selected word line to quickly transition to the desired read voltage, then the setup time is reduced, but voltage fluctuations occur on adjacent word lines
Solution Approach 1:
The patent applies a kick voltage to adjacent word lines in advance and in opposite polarity to the selected word line's kick voltage. This preliminary counter-action prevents the harmful voltage fluctuations that would otherwise occur on adjacent word lines when the selected word line experiences rapid voltage transition during multi-valued data reading operations.
Solution Approach 2:
The patent uses kick voltages of opposite polarity on adjacent word lines to counterbalance the voltage fluctuations induced by the selected word line's kick voltage. This counterweight approach ensures that the net voltage fluctuation on adjacent word lines is minimized, allowing fast read operations without interfering with neighboring memory cells.
2Quantity of substance
If multi-valued memory cell transistors are used to increase storage capacity, then the data density is improved, but the reading speed decreases due to increased setup time
Solution Approach 1:
The patent applies kick voltages to both the selected word line and adjacent word lines before the actual read operation begins. This preliminary action pre-charges or pre-discharges the word lines to the appropriate voltage levels, eliminating the need for slow gradual voltage transitions during the read operation itself, thereby maintaining high reading speed while supporting multi-valued data storage.
Solution Approach 2:
The patent employs periodic kick voltage pulses applied to the selected word line and compensating kick voltage pulses to adjacent word lines during the read operation. This periodic action enables rapid, discrete voltage transitions that maintain high reading speed while accurately reading multi-valued data stored in the memory cell transistors.
Data Source
AI summary
A semiconductor storage device includes: a voltage generation circuit configured to generate a read voltage to be supplied to a selected word line to which a read-target memory cell transistor is connected and a read-pass voltage to be supplied to an adjacent word line; a word line driver configured to, when the read voltage transitions, apply the read voltage to the selected word line with a first kick voltage amount and apply the read-pass voltage to the adjacent word line with a second kick voltage amount; and a control circuit configured to set each of the first kick voltage amount and the second kick voltage amount to a voltage corresponding to an amount of the transition.