k-NN ASIC Memory Architecture for Low-Power AI Classification
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing AI systems for k-Nearest Neighbors (k-NN) algorithms are costly, power-consuming, and require multiple CPUs and GPUs for intensive computations, with FPGA-based solutions being limited by resource and memory constraints, making them inefficient for large datasets.
Innovation Solution
A system and method utilizing an ASIC architecture with SRAM/DRAM/non-volatile memory, a memory block for storing learning and classification data, a calculation block for distance calculation, a sorting block for result determination, and a control block for user interaction, along with state machines to facilitate efficient k-NN calculations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If CPU/GPU combinations are used for AI computations, then calculation capability is improved, but power consumption and cost increase significantly
Solution Approach 1:
The patent replaces the mechanical computing system (CPU/GPU) with a neuromorphic computing system that mimics biological neural networks. The system uses artificial neurons and synapses implemented in hardware to perform parallel computations, eliminating the need for high-clock-speed general-purpose processors and significantly reducing power consumption while maintaining AI calculation capability.
Solution Approach 2:
The patent changes the fundamental operating parameters of the computing system by using continuous analog voltages to represent neural activations and weights, rather than discrete digital values processed sequentially. This analog computation approach enables massive parallelism and reduces power consumption compared to digital CPU/GPU systems.
2Speed
If FPGA is used for hardware acceleration, then computation speed is improved, but resource limitations and memory constraints reduce efficiency for large datasets
Solution Approach 1:
The patent segments the neuromorphic computing system into modular components: input layer, hidden layers, output layer, synaptic weight memory, and neuron computation units. Each module can be independently configured and scaled, allowing the system to handle large datasets without being constrained by monolithic resource limitations found in FPGA implementations.
Solution Approach 2:
The patent adds a temporal dimension to the computation by implementing continuous-time neural network dynamics, allowing computations to unfold over time rather than being constrained to discrete clock cycles. This enables the system to process large datasets efficiently without being limited by synchronous architecture constraints.
Data Source
AI summary
The present invention relates to a system and method having the Artificial Intelligence (AI) algorithm of k-Nearest Neighbors (k-NN) as logic gates and SRAM/DRAM/non-volatile memory. One of the advantages of the system is that it utilizes a low power consumption. This is compared to few watts power consumption for existing AI platform available in the market The system of the present invention is also very efficient as it does not need CPU or GPU to do the intensive calculation, as it is fully logic design. In addition, the system of the present invention is also low in cost due to small die size as it does not require any CPU or GPU to perform the intensive computation.