L Driving Method for Parallel Program Execution on Single Processor
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Solution Overview
Problem
Conventional computer processors are unable to execute multiple programs in parallel on a single processor simultaneously due to their single-program-oriented architecture, leading to reduced system performance when handling multiple user applications and tasks.
Innovation Solution
The 'L' driving method and computer processor architecture provide a program execution driver (PED) for each program, enabling independent or cooperative management and control of multiple programs' execution on a single processor without interrupts, utilizing a system with parallel sections and a system management program to schedule and execute programs in parallel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single-program-oriented architecture is used, then the processor can execute one program at a time with simple control logic, but the system performance is reduced when handling multiple user applications and tasks
Solution Approach 1:
The processor is divided into multiple independent program execution sections (first program execution section, second program execution section, etc.), each capable of executing a different program simultaneously. This segmentation allows parallel execution of multiple programs without requiring a single complex scheduling mechanism, thereby improving system performance while maintaining relatively simple control logic in each section.
Solution Approach 2:
The patent transitions from sequential program execution (one dimension in time) to parallel program execution by adding spatial dimensionality through multiple execution sections. Each execution section operates independently on its own program, effectively adding a spatial dimension to program execution and enabling simultaneous processing of multiple applications.
2Productivity
If multiple programs are executed in parallel on a single processor, then system performance is improved, but the processor architecture becomes more complex
Solution Approach 1:
The processor is divided into multiple independent program execution sections (first program execution section, second program execution section, etc.), each capable of executing a different program simultaneously. This segmentation allows parallel execution of multiple programs without requiring a single complex scheduling mechanism, thereby improving system performance while maintaining relatively simple control logic in each section.
Solution Approach 2:
Each program execution section is designed with universal functionality to execute any program independently. The sections share common resources such as the memory section and section-interlinking section, allowing the processor to handle multiple different types of applications simultaneously without requiring specialized hardware for each program type.
3Ease of operation
If conventional scheduling is used to handle multiple programs, then all programs can be managed on a single processor, but the entire performance of the system is reduced due to scheduling overhead
Solution Approach 1:
The processor is divided into multiple independent program execution sections (first program execution section, second program execution section, etc.), each capable of executing a different program simultaneously. This segmentation allows parallel execution of multiple programs without requiring a single complex scheduling mechanism, thereby improving system performance while maintaining relatively simple control logic in each section.
Solution Approach 2:
Each program execution section operates independently and autonomously manages its own program execution without requiring centralized scheduling intervention. The sections self-coordinate through the section-interlinking section and memory section, eliminating the performance overhead associated with conventional centralized scheduling mechanisms.
Data Source
AI summary
The invention relates to computer architecture technology in the computer field. More specifically, the invention relates to a novel driving method for driving computer program/instruction execution, and a computer processor architecture and computer processor using the method. As one of the features of the invention, even on condition that no interrupt process is involved, the processor of this type can execute multiple programs in parallel on a single processor of this type exactly at the same time. Herein, the single processor relates to a single processor comprised of an instruction control section, an operation control section, a program memory section, a data memory section, and a communicating section. As another feature of the invention, a program execution driver (PED) is provided for each of the programs, and the multiple PED can manage and control the execution of multiple programs in parallel on the above single processor at the same time, independently or cooperatively with each other. The invention is adapted for design various computer processors, such as single chip micyocos, DSP and computer CPU with various scales.