L-Shaped Stacked FET Contacts for Lower Gate Capacitance
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Solution Overview
Problem
Current monolithic stacked field effect transistor (SFET) fabrication is challenging due to issues such as providing a wider separation between top and bottom FETs, reducing direct facing gate-to-contact capacitance, and ensuring adequate contact interface, particularly when using single self-aligned contact (SAC) caps.
Innovation Solution
The development of an L-shaped stacked field effect transistor (SFET) with separate top and bottom SAC caps, where the top and bottom SAC caps are formed at different elevations, allowing for a relatively wider contact interface, reducing direct facing capacitance by leveraging separate top and bottom SAC caps, and forming a bottom SAC caps, which frees the bottom SAC cap from top SAC cap requirements, allowing for a relatively wider bottom contacts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If a single self-aligned contact (SAC) cap is used in monolithic stacked FET fabrication, then the fabrication process is simplified, but the contact interface width is limited and direct facing gate-to-contact capacitance increases
Solution Approach 1:
The patent divides the single SAC cap structure into separate top and bottom SAC caps at different elevations. This segmentation allows each cap to be independently optimized for its respective contact interface, enabling wider contact interfaces without complicating the overall fabrication process excessively.
Solution Approach 2:
The patent introduces a vertical dimension differentiation by placing top and bottom SAC caps at different elevations. This dimensional change allows the bottom SAC cap to be positioned lower to achieve a wider contact interface while the top SAC cap remains at a higher elevation, effectively resolving the capacitance and width trade-off.
2Productivity
If top and bottom FETs are closely stacked to increase device density, then device footprint is reduced, but direct facing gate-to-contact capacitance increases
Solution Approach 1:
By utilizing different elevations for top and bottom SAC caps, the patent creates vertical separation between the gate structures and contact regions. This dimensional approach allows closely stacked FETs to maintain high density while reducing direct facing capacitance through the elevation difference between caps.
Solution Approach 2:
The separate top and bottom SAC caps act as intermediary structures that mediate between the closely stacked gate regions. These caps provide isolated contact interfaces that reduce direct capacitive coupling between adjacent FET gates while maintaining the high-density stacked configuration.
3Manufacturing precision
If the bottom SAC cap is constrained by top SAC cap requirements, then fabrication alignment is simplified, but the bottom contact interface width is limited
Solution Approach 1:
By segmenting the SAC cap structure into independent top and bottom caps, the patent allows each cap to be independently sized and positioned. The bottom SAC cap can be made wider to achieve a larger contact interface without being constrained by the dimensions of the top SAC cap, while still maintaining fabrication alignment through the self-aligned process.
Data Source
AI summary
Embodiments of the present disclosure are directed to L-shaped stacked field effect transistor (SFET) processing methods and resulting structures having separate top and bottom self-aligned contact (SAC) caps. In a non-limiting embodiment, a first nanosheet stack having a first nanosheet and a second nanosheet stack having a second nanosheet are vertically stacked. A gate is formed around a channel region of the first nanosheet and a channel region of the second nanosheet. The gate includes a first portion recessed to a first gate height and a second portion recessed to a second gate height less than the first gate height. A bottom self-aligned contact cap is formed on the second portion of the gate and a top self-aligned contact cap is formed on the first portion of the gate.