L-Shaped Memory Gate Fabrication via Self-Aligned Etching
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Solution Overview
Problem
Current flash memory devices face challenges in efficiently forming L-shaped memory gate structures and charge storage layers, which are crucial for reliable data storage due to limitations in existing fabrication processes.
Innovation Solution
The process involves forming a control gate structure over a substrate, depositing a memory gate layer, and applying a self-aligned etching process to create an L-shaped memory gate structure, followed by the formation of spacers and a charge storage layer, ensuring precise dimensions and isolation within a dielectric environment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional fabrication processes are used to form memory gate structures, then the manufacturing process is simpler, but the manufacturing precision and reliability of L-shaped memory gate structures deteriorate
Solution Approach 1:
A spacer layer is formed over the substrate before depositing the memory gate layer. This preliminary spacer structure serves as a template that guides the self-aligned etching process to create the L-shaped memory gate structure with precise dimensions, eliminating the need for complex multi-step alignment procedures.
Solution Approach 2:
The spacer layer automatically defines the geometry of the L-shaped memory gate structure through self-aligned etching. The etch process uses the spacer as a built-in mask, allowing the memory gate layer to be patterned precisely without requiring external alignment marks or complex photolithography steps, thereby improving manufacturing precision while reducing process complexity.
2Reliability
If charge storage layers are formed in existing flash memory devices, then data storage capability is provided, but salicide formation occurs on the memory gate reducing reliability
Solution Approach 1:
The harmful salicide formation is eliminated by removing or protecting the memory gate regions during the charge storage layer formation process. The spacer layer structure prevents direct contact between the charge storage layer materials and the memory gate, extracting the source of the harmful interaction while preserving the data storage functionality.
Solution Approach 2:
The spacer layer acts as an intermediary barrier between the charge storage layer and the memory gate structure. This intermediate layer prevents the formation of harmful salicides by isolating the memory gate from reactive materials during fabrication, thereby improving reliability without compromising the charge storage capability.
3Productivity
If precise L-shaped memory gate structures are formed, then data storage efficiency is enhanced, but the fabrication process becomes more complex
Solution Approach 1:
The spacer layer is deposited and patterned before the memory gate layer, creating a pre-defined template that simplifies subsequent processing. This preliminary structure enables the formation of precise L-shaped gates through self-aligned etching, achieving high data storage efficiency without requiring complex alignment procedures.
Solution Approach 2:
The fabrication process utilizes self-aligned etching where the spacer layer automatically serves as the etch mask. This self-service mechanism eliminates the need for complex photolithography alignment steps, making the manufacturing of precise L-shaped structures easier while maintaining high productivity and data storage efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the fabrication of reliable L-shaped memory gate structures and charge storage layers, enhancing data storage efficiency and preventing salicide formation on the memory gate, thus improving the overall performance of flash memory devices.
Implementation Method 1
applying a self-aligned etching process to create an L-shaped memory gate structure
Implementation Method 2
depositing a memory gate layer, and applying a self-aligned etching process
Data Source
AI summary
A method comprises forming a control gate structure over a substrate, depositing a memory gate layer over the substrate, applying a first etching process to the memory gate layer to form a memory gate structure, wherein, after applying the first etching process, a remaining portion of the memory gate layer is an L-shaped structure, forming a first spacer along a sidewall of the memory gate structure and forming a second spacer over the memory gate structure.