L-Shaped Conductive Pattern Slits for Stable Semiconductor Current Flow
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Solution Overview
Problem
The flow of current in semiconductor devices with slits in the wiring pattern is at risk of being disturbed due to the shape of the wiring pattern, affecting the yield ratio.
Innovation Solution
The semiconductor device incorporates slits in the wiring pattern that are strategically positioned and angled to minimize disruption to current flow, with varying slit orientations and lengths to reduce resistance and maintain smooth current flow, even in complex crank-shaped patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If slits are formed on the wiring pattern to increase yield ratio, then manufacturing reliability is improved, but current flow is disturbed
Solution Approach 1:
The patent applies local quality by making the slit characteristics (orientation, length, position) location-dependent within the wiring pattern. Different regions of the wiring pattern have slits with different properties optimized for their specific function - power supply lines have slits oriented to minimize resistance increase, while signal lines have slits positioned to avoid current disturbance. This local optimization resolves the contradiction by allowing yield improvement through slits while minimizing overall current flow disturbance.
Solution Approach 2:
The patent changes multiple parameters of the slits simultaneously - orientation angle, length, width, and position - to optimize the balance between yield ratio and current flow characteristics. By systematically varying these parameters based on the wiring pattern geometry and electrical requirements, the patent achieves both improved manufacturing reliability through slit formation and minimized electrical performance degradation.
2Reliability
If slits are formed on the wiring pattern, then stress is reduced and yield ratio increases, but resistance increases due to current path disruption
Solution Approach 1:
The patent employs asymmetry by orienting slits at specific non-uniform angles relative to the current flow direction. Rather than using symmetric or uniformly oriented slits, the invention positions slits with varying orientations (e.g., parallel to current flow in some regions, perpendicular in others) to minimize the increase in electrical resistance while maintaining the stress relief benefits of slit formation.
Solution Approach 2:
The patent addresses resistance control by considering three-dimensional factors including the depth of slits through the wiring layer thickness and their spatial distribution across the plane. By optimizing slits in multiple dimensions (position, orientation, depth, spacing), the invention minimizes current path disruption and resistance increase while achieving the desired stress relief and yield improvement.
Data Source
AI summary
Disclosed herein is an apparatus that includes a semiconductor substrate having a main surface extending in a first direction and a second direction different from the first direction and a conductive pattern formed over the main surface of the semiconductor substrate. The conductive pattern includes a first section extending in the first direction, a second section extending in the second direction, and a third section connected between the first and second sections. The third section of the conductive pattern has a first slit extending in a third direction different from the first and second directions.