L-Shaped Transistor Memory Cell for Non-Volatile Storage

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Solution Overview

Problem

Existing memory cell technologies using ferroelectric capacitors face challenges in maintaining non-volatile storage due to the risk of polarization reversal during reading operations, requiring immediate rewriting of memory states after reading.

Innovation Solution

The design incorporates an array of memory cells with a capacitor and an elevationally-extending transistor, where capacitors utilize ferroelectric material for non-volatile storage, and transistors are constructed with L-shaped semiconductor material to optimize interconnectivity and reduce polarization reversal risks through specific electrode and insulator configurations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of stationary object

If ferroelectric capacitors are used for non-volatile storage, then data retention capability is improved, but polarization reversal during read operations occurs causing data instability

Engineering Contradiction:

Improvedata retention capabilityVSAvoiddata stability during read operations

Core Design Contradiction:

Duration of action of stationary objectVSReliability

Solution Approach 1:

The memory cell is segmented into distinct functional regions: a first region containing the ferroelectric capacitor for non-volatile storage, and a second region containing the vertical transistor for read/write operations. This spatial segmentation isolates the capacitor from the high-stress transistor operations, reducing polarization reversal risks while maintaining non-volatile storage capabilities.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

A charge storage node is introduced as an intermediary between the ferroelectric capacitor and the transistor. This intermediary node buffers the interaction between read/write operations and the capacitor, preventing direct stress that would cause polarization reversal while still enabling data transfer and retention.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Ease of manufacture

If conventional planar transistors are used, then manufacturing simplicity is maintained, but interconnectivity and density are limited

Engineering Contradiction:

Improvemanufacturing simplicityVSAvoidinterconnectivity and density

Core Design Contradiction:

Ease of manufactureVSProductivity

Solution Approach 1:

The transistor structure transitions from a planar configuration to a vertical configuration, extending the channel region in the vertical dimension rather than solely in the lateral plane. This dimensional change enables higher density and improved interconnectivity while maintaining compatibility with existing manufacturing processes that can form vertical structures through modified deposition and etching sequences.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances the reliability of non-volatile memory storage by minimizing polarization reversal during read operations, ensuring stable data retention and efficient data management within the memory array.

Implementation Method 1

One type of non-volatile capacitor is a ferroelectric capacitor which has ferroelectric material as at least part of the insulating material. Ferroelectric materials are characterized by having two stable polarized states and thereby can comprise programmable material of a capacitor and/or memory cell.

Methodology Applied

Scientific EffectFerroelectricity:

Implementation Method 2

A capacitor has two electrical conductors separated by electrically insulating material. Energy as an electric field may be electrostatically stored within such material.

Methodology Applied

Scientific EffectElectrostatic energy storage: Capacitance

Implementation Method 3

The gate insulator may be programmable, for example being ferroelectric.

Methodology Applied

Scientific EffectCharge storage in insulator: Dielectric Permittivity

Data Source

PatentUS11545492B2Transistors, arrays of transistors, arrays of memory cells individually comprising a capacitor and an elevationally-extending transistor, and methods of forming an array of transistors

Publication Date: 2023.01.03 MICRON TECHNOLOGY INC

AI summary

A transistor comprises semiconductor material that is generally L-shaped or generally mirror L-shaped in at least one straight-line vertical cross-section thereby having an elevationally-extending stem and a base extending horizontally from a lateral side of the stem above a bottom of the stem. The semiconductor material of the stem comprises an upper source/drain region and a channel region there-below. The transistor comprises at least one of (a) and (b), where (a): the semiconductor material of the stem comprises a lower source/drain region below the channel region, and (b): the semiconductor material of the base comprises a lower source/drain region. A gate is operatively laterally adjacent the channel region of the stem. Other embodiments are disclosed, including arrays of memory cells individually comprising a capacitor and an elevationally-extending transistor. Methods are disclosed.