L-Shaped Via Interconnect Layout for Zero Track Skipping

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Solution Overview

Problem

Conventional semiconductor manufacturing techniques face challenges in efficiently connecting interconnect lines across different levels with zero track skipping, leading to limited space for metal interconnect line extensions and potential misalignment issues.

Innovation Solution

The implementation of interconnect structures with vias having both vertical and horizontal sections, allowing for zero or negative line extensions, which are connected through an L-shaped or Z-shaped layout, ensuring strong landings and minimizing the risk of unintended shorting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If conventional via structures are used to connect interconnect lines across different levels, then alignment precision is maintained, but space efficiency deteriorates due to limited space for metal interconnect line extensions

Engineering Contradiction:
Improvespace efficiencyVSAvoidalignment precision
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The via structure is extended from a simple vertical configuration to include horizontal sections that laterally connect to interconnect lines. This dimensional expansion allows the via to achieve both better alignment tolerance and improved space efficiency by utilizing lateral space rather than relying solely on vertical alignment.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The via is divided into multiple sections: a vertical section for depth penetration and horizontal sections for lateral connection. This segmentation allows each section to perform its specific function optimally - the vertical section provides structural support and depth access, while horizontal sections provide alignment tolerance and space efficiency.

Inventive Principle:
Principle #1Segmentation

2Reliability

If zero track skipping is implemented to connect interconnect lines, then connectivity between levels is improved, but device complexity increases due to potential misalignment issues

Engineering Contradiction:
ImproveconnectivityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

By adding horizontal dimensions to the via structure, the patent achieves zero track skipping connectivity while reducing misalignment risks. The horizontal sections allow the via to laterally align with interconnect lines, improving connectivity reliability without increasing vertical structural complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Area of stationary object

If via structures are designed with extended horizontal sections, then space for metal interconnect line extensions is increased, but manufacturing complexity worsens

Engineering Contradiction:
Improvespace for metal extensionsVSAvoidmanufacturing complexity
Core Design Contradiction:
Area of stationary objectVSEase of manufacture

Solution Approach 1:

The horizontal sections of the via are formed preliminarily during the via formation process itself, rather than requiring separate subsequent steps. This preliminary action integrates the complex horizontal-vertical via structure into the standard via formation workflow, reducing manufacturing complexity despite the enhanced space efficiency.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12463128B2Interconnect structures with vias having vertical and horizontal sections
Publication Date: 2025.11.04 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US12463128B2 patent drawing
  • US12463128B2 patent drawing
  • US12463128B2 patent drawing

AI summary

A microelectronic structure comprises a first interconnect line at a first interconnect level, a second interconnect line at a second interconnect level, and at least one via connecting the first interconnect line at the first interconnect level to the second interconnect line at the second interconnect level. The at least one via comprises a vertical section and at least one horizontal section, the at least one horizontal section being in contact with at least a portion of one of a top surface of the first interconnect line and a bottom surface of the second interconnect line.