L-Shaped Word Lines in 3D Memory via Segmented Fabrication
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Solution Overview
Problem
Current three-dimensional memory devices face challenges in efficiently manufacturing L-shaped word lines and support structures, which are crucial for enhancing memory density and reliability, due to complex processing steps and potential structural instability.
Innovation Solution
A method involving the formation of alternating stacks of L-shaped insulating and sacrificial material layers over a substrate, followed by planarization and replacement with electrically conductive layers to create L-shaped word lines, along with the use of dielectric spacers and support structures to ensure structural integrity and contact via formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If traditional methods are used to form L-shaped word lines and support structures, then manufacturing complexity increases and structural stability decreases, but if new methods are employed, then manufacturing process simplifies and structural integrity improves
Solution Approach 1:
The patent divides the formation process into distinct segments: first forming the support structure, then forming the alternating stack of insulating and sacrificial material layers, and finally replacing the sacrificial material with conductive material. This segmentation allows each step to be optimized independently, reducing overall manufacturing complexity while improving structural integrity.
Solution Approach 2:
The support structure is formed in advance before the alternating stack is created. This preliminary action provides a stable foundation that prevents structural collapse during subsequent processing steps, thereby improving structural integrity without adding complexity to the overall manufacturing process.
2Reliability
If L-shaped word lines are formed using conventional approaches, then manufacturing cost increases and structural reliability decreases, but the patent's method reduces cost and enhances reliability
Solution Approach 1:
The patent introduces a sacrificial material layer as an intermediary that is temporarily placed between the insulating layers. This intermediary enables the formation of the L-shaped word lines with proper spacing and alignment, improving reliability while the entire process remains integrated and cost-effective.
Solution Approach 2:
The patent changes the physical and chemical parameters of materials at different stages: using sacrificial material that can be selectively removed, then replacing it with conductive material having different electrical properties. These parameter changes enable precise control over the final structure's reliability without complicating the manufacturing process.
3Quantity of substance
If memory density is increased through L-shaped word lines, then device performance improves, but manufacturing complexity increases
Solution Approach 1:
The patent merges the formation of support structures and L-shaped word lines into a single integrated process flow. By combining these functions into one unified manufacturing sequence, the patent achieves high memory density through L-shaped configurations without proportionally increasing processing step complexity.
Solution Approach 2:
The alternating stack structure serves multiple functions simultaneously: it provides electrical insulation, defines word line positions, and enables the L-shaped configuration for increased density. This multi-functionality reduces the need for separate processing steps, thereby increasing memory density without commensurate increases in manufacturing complexity.
Data Source
AI summary
A three-dimensional memory device includes a first alternating stack of first insulating layers and first electrically conductive layers located over a top surface of a substrate, such that each of the first insulating layers and the first electrically conductive layers includes a respective horizontally-extending portion and a respective non-horizontally-extending portion, memory stack structures extending through a memory array region of the first alternating stack that includes the horizontally-extending portions of the first electrically conductive layers, such that each of the memory stack structures comprises a memory film and a vertical semiconductor channel, a mesa structure located over the substrate, such that each respective non-horizontally-extending portion of the first insulating layers and the first electrically conductive layers is located over a sidewall of the mesa structure, and contact structures that contact a respective one of the non-horizontally-extending portions of the first electrically conductive layers.