L0 Hypervisor Acceleration for L2 Virtual Passthrough I/O

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Solution Overview

Problem

In virtualization environments, the performance of virtual passthrough I/O devices is hindered by the need for MMIO BAR emulation, which leads to increased latency and reduced efficiency due to the involvement of multiple virtual machine layers, particularly when accessing physical I/O devices.

Innovation Solution

The implementation of identity-mapped MMIO BAR addresses and direct handling of L2 MMIO BAR accesses at the L0 level, bypassing L1 virtual machine emulation, allows for accelerated I/O device performance by routing VM exits directly to the L0 hypervisor, thereby simplifying address translation and improving throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If MMIO BAR emulation is used for virtual passthrough I/O devices, then virtual machine compatibility is maintained, but I/O device performance deteriorates due to increased latency

Engineering Contradiction:
ImproveI/O device throughputVSAvoidMMIO access latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent extracts the MMIO BAR emulation function from the L1 virtual machine layer and relocates it to the L0 hypervisor layer. This allows L2 virtual machines to access I/O devices directly through the L0 hypervisor without passing through L1 emulation, thereby reducing latency and improving throughput while maintaining virtualization compatibility

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a new address mapping dimension by implementing identity-mapped MMIO BAR addresses that span across multiple virtualization layers. This allows L2 MMIO addresses to be directly translated to physical addresses at the L0 level, bypassing the traditional L1 emulation path and creating a more efficient multi-layer address translation architecture

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If multiple virtual machine layers are involved in MMIO access, then virtualization isolation is maintained, but address translation complexity increases

Engineering Contradiction:
Improvevirtual machine isolationVSAvoidaddress translation path
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the address translation function from the L1 layer and consolidates it at the L0 hypervisor layer. This maintains the isolation benefits of multiple virtualization layers while simplifying the address translation path to a single point of control, reducing overall system complexity

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The L0 hypervisor is designed to handle MMIO address translation for multiple virtual machine layers universally. By implementing a unified address translation mechanism that serves L1 and L2 virtual machines, the system maintains isolation while reducing the complexity of managing separate translation paths

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20240118914A1Accelerated virtual passthrough I/O device performance
Publication Date: 2024.04.11 INTEL CORP
  • US20240118914A1 patent drawing
  • US20240118914A1 patent drawing
  • US20240118914A1 patent drawing

AI summary

An L2 virtual machine (VM) operating in a trust domain invokes a memory operation involving a virtual I/O device passed through from an L1 VM. Invocation of the memory operation causes an L2 virtual I/O device driver to make a hypercall to a trust domain management module. The hypercall comprises a memory-mapped I/O (MMIO) address of the virtual I/O device as seen by the L2 VM (L2 MMIO address), which matches the MMIO address of the virtual I/O device as seen by the L1 VM. The module passes hypercall information to an LO hypervisor, which forwards the information to an emulator operating in LO user space that emulates the back end of the virtual I/O device operating on the L1 VM. The emulator determines an emulated software response based on the L2 MMIO address and the memory operation is carried out.