L1 Cache Hazard Detection Using Inflight Prefetch Scoreboards
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Solution Overview
Problem
Existing cache systems face inefficiencies due to cache hazards where a demand fetch occurs while a prefetch is pending, leading to redundant operations and increased electrical power consumption in detecting these hazards.
Innovation Solution
A cache system that detects cache hazards by determining the cache way upon a cache miss and storing it in the scoreboard entry, reducing electrical power consumption by comparing the allocated way of the demand request to only matching scoreboard entries, thereby avoiding unnecessary comparisons.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If cache hazard detection is performed by comparing the instruction request address with all scoreboard entries, then cache hazards are detected, but electrical power consumption increases due to the large number of comparisons required
Solution Approach 1:
The patent segments the cache hazard detection process into two stages: first comparing only the cache way (set index) of the demand request with scoreboard entries, and only if there is a match, then performing the full address comparison. This segmentation reduces the number of full comparisons needed, thereby reducing power consumption while maintaining detection accuracy.
Solution Approach 2:
The patent applies local quality by making different parts of the comparison process have different levels of activity. The cache way comparison is performed for all entries, but the full address comparison is performed only for matching entries. This localized intensive operation reduces overall power consumption while maintaining detection reliability.
2Productivity
If a demand fetch is generated when a cache miss occurs, then the instruction request is serviced, but redundant operation occurs if a prefetch for the same instruction is pending, negating the value of the pending prefetch
Solution Approach 1:
The patent performs preliminary action by detecting pending prefetches in the scoreboard before generating a demand fetch. By checking the scoreboard for existing prefetch requests matching the demand request's cache way, the system prevents redundant prefetch operations, avoiding waste of energy and maintaining instruction service efficiency.
Solution Approach 2:
The patent uses feedback from the scoreboard, which tracks pending prefetch requests, to control whether a demand fetch should be generated. The scoreboard provides real-time information about ongoing prefetch operations, enabling the system to make informed decisions about whether to initiate additional fetch operations, thereby eliminating redundancy.
3Reliability
If the scoreboard stores detailed request information for hazard detection, then accurate cache hazard detection is achieved, but the complexity of the hazard detection process increases due to address size and number of scoreboard entries
Solution Approach 1:
The patent segments the hazard detection comparison into two distinct phases: first comparing the cache way (a smaller field) with scoreboard entries, and only for matches, then comparing the full instruction request address. This segmentation reduces the immediate computational complexity while maintaining full detection accuracy through the two-stage process.
Solution Approach 2:
The patent applies local quality by concentrating intensive comparison operations only on scoreboard entries that match on the cache way field. Rather than performing full address comparisons uniformly across all entries, the system locally intensifies operations only where necessary, reducing overall circuit complexity and power consumption.
Data Source
AI summary
Disclosed embodiments provide a technique in which a memory controller determines whether a fetch address is a miss in an L1 cache and, when a miss occurs, allocates a way of the L1 cache, determines whether the allocated way matches a scoreboard entry of pending service requests, and, when such a match is found, determine whether a request address of the matching scoreboard entry matches the fetch address. When the matching scoreboard entry also has a request address matching the fetch address, the scoreboard entry is modified to a demand request.