L2 Cache Configuration Data Storage Using Compression

Solution Overview

Problem

As device complexity increases, especially in multi-core microprocessors, the need for configuration and repair data storage becomes a challenge due to limited real estate and power constraints on a single die, and existing fuse array mechanisms are inadequate for efficient initialization and configuration following power gating events.

Innovation Solution

A semiconductor fuse array is programmed with compressed configuration data, and a storage mechanism is implemented on the die to store and access decompressed data sets, allowing each core to initialize cache memories upon power-up/reset and restore configuration data after a power gating event.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If traditional fuse arrays are used to store configuration and repair data, then the data can be stored on the die, but the real estate required increases and power consumption increases

Engineering Contradiction:

Improveconfiguration data storage capacityVSAvoiddie real estate

Core Design Contradiction:

Quantity of substanceVSArea of stationary object

Solution Approach 1:

The patent merges the configuration data storage function into the existing L2 cache structure by utilizing unused or spare cache lines. Instead of implementing a separate fuse array, the configuration data is stored within the cache memory array itself, combining two functions (configuration storage and cache operation) into a single structure, thereby eliminating the need for additional die real estate.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The L2 cache structure is made multi-functional by serving both as a cache memory and as a configuration data storage medium. The same physical memory cells that store cache data during normal operation are also used to store configuration and repair data when needed, allowing a single structure to fulfill multiple purposes without requiring separate dedicated hardware.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Quantity of substance

If traditional fuse arrays are used to store configuration and repair data, then the data can be stored on the die, but the power consumption increases

Engineering Contradiction:

Improveconfiguration data storage capacityVSAvoidpower consumption

Core Design Contradiction:

Quantity of substanceVSUse of energy by stationary object

Solution Approach 1:

The patent merges the configuration data storage function into the existing L2 cache structure by utilizing unused or spare cache lines. Instead of implementing a separate fuse array, the configuration data is stored within the cache memory array itself, combining two functions (configuration storage and cache operation) into a single structure, thereby eliminating the need for additional die real estate.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The L2 cache structure is made multi-functional by serving both as a cache memory and as a configuration data storage medium. The same physical memory cells that store cache data during normal operation are also used to store configuration and repair data when needed, allowing a single structure to fulfill multiple purposes without requiring separate dedicated hardware.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Area of stationary object

If compressed configuration data is stored in the L2 cache, then real estate and power usage are reduced, but the data must be decompressed and restored after power gating events

Engineering Contradiction:

Improvedie real estateVSAvoidinitialization and restoration complexity

Core Design Contradiction:

Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent implements preliminary action by pre-decompressing configuration data from compressed form into the L2 cache structure during manufacturing or initial setup. The decompressed data is stored in a ready-to-use format within the cache, so that when power gating occurs, the system can rapidly restore configuration by simply reloading data from the existing L2 cache without needing to perform decompression operations at that later time.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The L2 cache acts as an intermediary structure between the compressed configuration data storage and the actual configuration usage. It holds pre-processed configuration data in an accessible format, mediating between the compressed source and the operational requirements, thereby simplifying the restoration process after power gating by eliminating the need for complex real-time decompression and reconfiguration operations.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS9665490B2Apparatus and method for repairing cache arrays in a multi-core microprocessor

Publication Date: 2017.05.30 VIA ALLIANCE SEMICON CO LTD

AI summary

An apparatus includes a fuse array, a stores, and a plurality of cores. The fuse array is programmed with compressed configuration data. The stores is for storage and access of decompressed configuration data sets. One of the plurality of cores accesses the fuse array upon power-up/reset to read and decompress the compressed configuration data, and to store the decompressed configuration data sets for one or more cache memories in the stores. Each of the plurality of cores includes reset logic and sleep logic. The reset logic is configured to employ the decompressed configuration data sets to initialize the one or more cache memories upon power-up/reset. The sleep logic is configured to determine that power is restored following a power gating event, and is configured to subsequently access the stores to retrieve and employ the decompressed configuration data sets to initialize the one or more caches following the power gating event.