L2P Mapping Table Updates Using a Reduced Journal Repository
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Solution Overview
Problem
The existing storage devices face challenges with poor random write performance and excessive DRAM requirements, which are exacerbated by frequent meta updates and power-outage issues, leading to inefficient metadata management and increased write amplification factors.
Innovation Solution
A method and device for managing metadata in storage devices by utilizing a reduced journal repository buffer to store L2P address mapping entries, allowing efficient updating and recovery of L2P tables, reducing DRAM requirements while maintaining 4K Logical Page size for random write performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the entire L2P address mapping table is stored in volatile memory (DRAM) to improve random write latency, then random write performance is improved, but the size of DRAM increases proportionally with SSD capacity
Solution Approach 1:
The L2P address mapping table is divided into multiple segments or partitions that can be stored in non-volatile memory. Only the actively accessed portions are loaded into volatile memory, reducing the required DRAM size while maintaining fast access performance for random writes.
Solution Approach 2:
The patent transitions from storing the entire L2P table in a single volatile memory space to a hierarchical structure spanning both volatile and non-volatile memory dimensions. This allows the system to leverage the speed of DRAM for active entries while using cheaper non-volatile memory for the complete address mapping table.
2Reliability
If frequent meta updates are performed to maintain L2P mapping accuracy, then data integrity is improved, but write amplification factor increases
Solution Approach 1:
The system performs preliminary actions by pre-allocation and pre-organization of L2P mapping entries in non-volatile memory before actual data writes occur. This reduces the need for frequent updates during normal operation, thereby lowering write amplification while maintaining data integrity through structured update mechanisms.
Solution Approach 2:
The patent implements a mechanism where obsolete or invalid L2P mapping entries are efficiently discarded and recovered only when necessary. This reduces unnecessary update operations and write amplification while ensuring that valid mappings are preserved and updated only when changes occur.
3Quantity of substance
If a reduced journal repository buffer is used to store L2P address mapping entries, then DRAM requirements are reduced, but the complexity of updating and recovering L2P tables increases
Solution Approach 1:
The patent introduces an intermediary journal repository buffer that mediates between the volatile and non-volatile memory systems. This buffer, though reduced in size, is strategically designed to hold critical L2P mapping entries during transitions, simplifying the update and recovery processes while minimizing DRAM usage.
Solution Approach 2:
The system maintains copies of essential L2P mapping entries in the reduced journal repository buffer during update operations. This copying mechanism ensures that critical data is preserved in volatile memory temporarily, facilitating easier recovery without requiring a full DRAM-sized buffer, thus balancing complexity and memory usage.
Data Source
AI summary
In the present disclosure, a method for improved metadata management includes receiving a memory write command from a host device, performing the data write operation, storing a mapping of the logical address and the physical address as a first logical-to-physical (L2P) address mapping entry of the volatile memory and as a second L2P address mapping entry of the buffer, determining whether a number of the second set of L2P address mapping entries of the buffer exceeds a predefined number of L2P address mapping entries, upon determining that the number of the second set of L2P address mapping entries of the buffer exceeds the predefined number of L2P address mapping entries, sequentially reading the plurality of L2P address mapping tables of the non-volatile memory, and updating the first set of L2P address mapping tables based on the first set of L2P address mapping entries of the volatile memory.