L2P Table Compression for SSD Memory Scaling
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Solution Overview
Problem
Conventional solid state drives (SSDs) face high volatile memory requirements for their logical block address to physical block address (L2P) tables, leading to increased costs and limited capacity scaling, especially in small form factors like the M.2 form factor, due to the need for significant DRAM to store indirection tables with 4 KiB granularity.
Innovation Solution
The proposed solution compresses the L2P table in groups of consecutive indirection unit entries, using a compression engine to reduce memory consumption, and provides overflow space for non-compressible groups, matching the compression size to the SSD controller's cache-line size for efficient read and write operations, and employs a write-back cache with a backing store on NAND for handling incompressible tables.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the L2P table stores NAND physical block addresses with 4 KiB indirection unit granularity, then the address mapping precision is improved, but the volatile memory consumption increases
Solution Approach 1:
The L2P table is divided into multiple compression units, each containing a subset of indirection units. This segmentation allows independent compression of each unit, reducing overall memory consumption while maintaining 4 KiB granularity address mapping precision through proper indexing and reconstruction of physical block addresses.
Solution Approach 2:
The patent changes the storage format of physical block addresses by encoding them in a compressed manner within compression units. Instead of storing full addresses for every indirection unit, it uses differential encoding and run-length compression techniques, transforming the parameter representation to achieve space efficiency while preserving address mapping accuracy.
2Adaptability or versatility
If the L2P table size increases to support larger SSD capacity, then the SSD capacity scaling is improved, but the volatile memory requirement and cost increase
Solution Approach 1:
The patent introduces a hierarchical structure with compression units and uses non-volatile memory as a backing store layer. This adds a new dimension to the memory hierarchy, allowing the L2P table to scale to large capacities by utilizing the abundant non-volatile memory space while keeping only essential portions in volatile memory, thus decoupling SSD capacity from volatile memory requirements.
Solution Approach 2:
The compression units are nested within compression unit groups, which are further nested within the overall L2P table structure. This nested organization allows efficient management of large L2P tables by processing and compressing data in manageable hierarchical layers, enabling capacity scaling without linearly increasing volatile memory requirements.
3Quantity of substance
If the L2P table is compressed to reduce memory consumption, then the volatile memory usage is reduced, but the complexity of read and write operations increases
Solution Approach 1:
The L2P table is pre-organized into compression units with embedded metadata during initialization and updates. This preliminary structuring includes compression headers, validity bits, and grouping information that enables the controller to efficiently navigate and decompress only the necessary portions during read/write operations, reducing the operational complexity despite the compressed format.
Solution Approach 2:
The patent introduces a compression unit structure as an intermediary layer between the logical block addresses and physical block addresses. This intermediary contains compressed PBA data along with metadata that facilitates efficient decompression and validation, simplifying the overall lookup process by providing structured intermediate representations rather than requiring direct decompression of raw data.
4Reliability
If the SSD uses more DRAM to support 4 KiB indirection units, then the address mapping capability is improved, but the manufacturing cost increases
Solution Approach 1:
The patent employs compression algorithms that create space-efficient representations of the L2P table, effectively replacing expensive DRAM with cheaper non-volatile memory for storing the indirection data. The compressed units can be regenerated or reloaded as needed, treating the compressed storage as a disposable, low-cost alternative to permanent DRAM allocation, thereby reducing manufacturing costs while maintaining address mapping reliability.
Data Source
AI summary
Provided are an apparatus, method, and system for logical block address to physical block address (L2P) compression. In response to a physical block address (PBA) of a first indirection unit (IU) among a plurality of IUs in a compression unit being updated, it is determined whether IU data of the plurality of IUs is compressible. In response to determining that the IU data is compressible, one or more contiguous IU groups in the compression unit that are compressible are identified based on corresponding PBAs and, then, a compression unit descriptor and PBAs for unique IUs of the plurality of IUs are written into the compression unit. In response to determining that the IU data is incompressible, a flag indicating that IU data is incompressible, PBAs for some of the IUs, and a pointer to PBAs of remaining IUs are written into the compression unit.